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DTC144T1

更新时间: 2024-09-24 22:54:39
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
8页 56K
描述
Bias Resistor Transistor

DTC144T1 数据手册

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DTC144TT1  
Preferred Device  
Bias Resistor Transistor  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base–emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the SC–59  
package which is designed for low power surface mount applications.  
http://onsemi.com  
NPN SILICON  
BIAS RESISTOR  
TRANSISTOR  
Simplifies Circuit Design  
Reduces Board Space  
PIN 3  
Reduces Component Count  
Moisture Sensitivity Level: 1  
ESD Rating – Human Body Model: Class 1  
ESD Rating – Machine Model: Class B  
COLLECTOR  
(OUTPUT)  
PIN 2  
BASE  
(INPUT)  
R
R
1
2
PIN 1  
EMITTER  
(GROUND)  
The SC–59 package can be soldered using wave or reflow. The  
modified gull–winged leads absorb thermal stress during soldering  
eliminating the possibility of damage to the die.  
Available in 8 mm embossed tape and reel  
3
Use the Device Number to order the 7 inch/3000 unit reel.  
1
2
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
SC–59  
CASE 318D  
STYLE 1  
V
CBO  
V
CEO  
50  
Vdc  
I
C
100  
mAdc  
MARKING DIAGRAM  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
8T  
M
Total Device Dissipation  
P
230 (Note 1.)  
338 (Note 2.)  
1.8 (Note 1.)  
2.7 (Note 2.)  
mW  
D
T = 25°C  
A
Derate above 25°C  
°C/W  
°C/W  
°C/W  
°C  
8T = Specific Device Code  
M = Date Code  
Thermal Resistance –  
Junction-to-Ambient  
R
540 (Note 1.)  
370 (Note 2.)  
θ
JA  
JL  
Thermal Resistance –  
Junction-to-Lead  
R
264 (Note 1.)  
287 (Note 2.)  
θ
ORDERING INFORMATION  
Junction and Storage  
Temperature Range  
T , T  
J
–55 to +150  
stg  
Device  
DTC144TT1  
Package  
Shipping  
3000/Tape & Reel  
SC–59  
DEVICE MARKING AND RESISTOR VALUES  
Device  
Marking  
R1 (K)  
R2 (K)  
Shipping  
Preferred devices are recommended choices for future use  
and best overall value.  
DTC144TT1  
8T  
47  
3000/Tape & Reel  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
May, 2002 – Rev. 1  
DTC144TT1/D  

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