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DS90C387RVJDX/NOPB PDF预览

DS90C387RVJDX/NOPB

更新时间： 2024-09-10 11:14:07
品牌 Logo 应用领域
德州仪器 - TI 驱动泵接口集成电路驱动器
页数 文件大小 规格书
33页 957K
描述
85MHz 双路 12 位双泵输入 LDI 发送器 VGA/UXGA | NEZ | 100 | -10 to 70

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DS90C387RVJDX/NOPB 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：TFQFP, TQFP100,.63SQ针数：100
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：5.44差分输出：YES
驱动器位数：8输入特性：STANDARD
接口集成电路类型：LINE DRIVER接口标准：EIA-644; TIA-644
JESD-30 代码：S-PQFP-G100JESD-609代码：e4
长度：14 mm湿度敏感等级：3
功能数量：8端子数量：100
最高工作温度：70 °C最低工作温度：-10 °C
输出特性：DIFFERENTIAL输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：TFQFP
封装等效代码：TQFP100,.63SQ封装形状：SQUARE
封装形式：FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
最大接收延迟：座面最大高度：1.2 mm
子类别：Line Driver or Receivers最大压摆率：235 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mm

DS90C387RVJDX/NOPB 数据手册

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DS90C387R  
www.ti.com  
SNLS062G –NOVEMBER 2000–REVISED JANUARY 2014  
DS90C387R 85MHz Dual 12-Bit Double Pumped Input LDI Transmitter - VGA/UXGA  
Check for Samples: DS90C387R  
1
FEATURES  
DESCRIPTION  
The DS90C387R transmitter is designed to support  
pixel data transmission from a Host to a Flat Panel  
Display up to UXGA resolution. It is designed to be  
compatible with Graphics Memory Controller Hub  
(GMCH) by implementing two data per clock and can  
be controlled by a two-wire serial communication  
interface. Two input modes are supported: one port of  
12-bit( two data per clock) input for 24-bit RGB, and  
two ports of 12-bit( two data per clock) input for dual  
24-bit RGB( 48-bit total). In both modes, input data  
will be clocked on both rising and falling edges in  
LVTTL level operation, or clocked on the cross over  
of differential clock signals in the low swing operation.  
Each input data width will be 1/2 of clock cycle. With  
an input clock at 85MHz and input data at 170Mbps,  
the maximum transmission rate of each LVDS line is  
2
•
Complies with Open LDI Specification for  
Digital Display Interfaces  
•
•
25 to 85MHz Clock Support  
Supports VGA through UXGA Panel  
Resolution  
•
Up to 4.76Gbps Bandwidth in Dual 24-bit RGB  
In-to-Dual Pixel Out Application  
•
•
•
•
Dual 12-bit Double Pumped Input DVO Port  
Pre-Emphasis Reduces Cable Loading Effects  
Drives Long, Low Cost Cables  
DC Balance Data Transmission Provided by  
Transmitter Reduces ISI Distortion  
•
•
•
•
•
•
•
Transmitter Rejects Cycle-to-Cycle Jitter (±2ns  
of Input Bit Period)  
595Mbps, for  
2.38Gbps/4.76Gbps.  
a
aggregate throughput rate of  
It converts 24/48 bits  
Support both LVTTL and Low Voltage Level  
Input (Capable of 1.0 to 1.8V)  
(Single/Dual Pixel 24-bit color) of data into 4/8 LVDS  
(Low Voltage Differential Signaling) data streams.  
DS90C387R can be programmed via the two-wire  
serial communication interface. The LVDS output pin-  
out is identical to DS90C387. Thus, this transmitter  
can be paired up with DS90CF388, receiver of the  
112MHz LDI chipset or FPD-Link Receivers in non-  
DC Balance mode operation which provides GUI/LCD  
panel/mother board vendors a wide choice of inter-  
operation with LVDS based TFT panels.  
Two-Wire Serial Communication Interface up  
to 400 KHz  
Programmable Input Clock and Control Strobe  
Select  
Backward Compatible Configuration with  
112MHz LDI and FPD-Link  
Optional Second LVDS Clock for Backward  
Compatibility with FPD-Link Receivers  
DS90C387R also comes with features that can be  
found on DS90C387. Cable drive is enhanced with a  
user selectable pre-emphasis feature that provides  
additional output current during transitions to  
counteract cable loading effects. DC Balancing on a  
cycle-to-cycle basis is also provided to reduce ISI  
(Inter-Symbol Interference), control signals (VSYNC,  
HSYNC, DE) are sent during blanking intervals. With  
pre-emphasis and DC Balancing, a low distortion eye-  
pattern is provided at the receiver end of the cable.  
These enhancements allow cables 5 to 15+ meters in  
length to be driven depending on media characteristic  
and pixel clock speed. Pre-emphasis is available in  
both the DC Balanced and Non-DC Balanced modes.  
In the Non-DC Balanced mode backward  
compatibility with FPD-Link Receivers is obtained.  
Compatible with TIA/EIA-644  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2000–2014, Texas Instruments Incorporated  
1234567...33

中文翻译

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DS90C387RVJDX/NOPB 替代型号

型号 品牌 替代类型 描述 数据表
DS90C387RVJD/NOPB TI

完全替代

 85MHz 双路 12 位双泵输入 LDI 发送器 VGA/UXGA | NEZ | 10

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 		双路低电压差动信号驱动器
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