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DS3142N PDF预览

DS3142N

更新时间: 2024-10-28 20:02:59
品牌 Logo 应用领域
美信 - MAXIM 电信电信集成电路
页数 文件大小 规格书
88页 1151K
描述
Framer, PBGA144, 13 X 13 MM, CSBGA-144

DS3142N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:13 X 13 MM, CSBGA-144针数:144
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.68JESD-30 代码:S-PBGA-B144
长度:13 mm湿度敏感等级:3
功能数量:1端子数量:144
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):240认证状态:Not Qualified
座面最大高度:1.75 mm标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:FRAMER
温度等级:INDUSTRIAL端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:20宽度:13 mm
Base Number Matches:1

DS3142N 数据手册

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DESIGN KIT AVAILABLE  
DS3141
/
DS3142
/
DS3143/DS3144  
Single/Dual/Triple/Quad  
DS3/E3 Framers  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
The DS3141, DS3142, DS3143, and DS3144  
(DS314x) devices include all necessary circuitry to  
frame and format up to four separate DS3 or E3  
channels. Each framer in these devices is  
independently configurable to support M23 DS3,  
C-Bit Parity DS3, or G.751 E3. The framers interface  
CꢀOne/Two/Three/Four Independent DS3/E3  
Framers on a Single Die  
CꢀFraming and Formatting to M23 DS3, C-Bit Parity  
DS3, and G.751 E3  
CꢀLIU Interface can be Binary (NRZ) or Dual-Rail  
(POS/NEG)  
to  
a
variety of line interface units (LIUs),  
CꢀB3ZS/HDB3 Encoder and Decoder  
microprocessor  
buses,  
and  
other  
system  
CꢀGenerate and Detect DS3/E3 Alarms  
CꢀIntegrated HDLC Controller for Each Channel  
CꢀIntegrated FEAC Controller for Each Channel  
CꢀIntegrated Bit Error-Rate Tester (BERT) for Each  
Channel  
components without glue logic. Each DS3/E3 framer  
has its own HDLC controller, FEAC controller, and  
BERT, as well as full support for error detection and  
generation, performance monitoring, and loopbacks.  
CꢀLarge Performance-Monitoring Counters  
CꢀLine, Diagnostic, and Payload Loopbacks  
APPLICATIONS  
SONET/SDH Muxes  
PDH Muxes  
CꢀExternally Controlled Transmit Overhead  
Insertion Port  
Digital Cross-Connect Systems  
Access Concentrators  
ATM and Frame Relay Equipment  
Routers  
CꢀSupport External Timing or Loop-Timing  
CꢀFramers can be Powered Down When Not Used  
Cꢀ8-Bit Processor Port Supports Muxed or  
Nonmuxed Bus Operation (Intel or Motorola)  
Cꢀ3.3V Supply with 5V Tolerant I/O  
FUNCTIONAL DIAGRAM  
Cꢀ144-Pin, 13mm x 13mm CSBGA Package  
CꢀIEEE 1149.1 JTAG Support  
LIU  
SYSTEM  
EACH FRAMER  
INTERFACE  
INTERFACE  
ORDERING INFORMATION  
CLK  
POS/NRZ  
NEG  
TRANSMIT  
DATA  
NO. OF  
SYNC  
FORMATTER  
CLK  
PART  
TEMP RANGE  
PIN-PACKAGE  
FRAMERS  
OVERHEAD  
DS3141  
DS3141N  
DS3142  
DS3142  
DS3143  
DS3143N  
DS3144  
DS3144N  
1
1
2
2
3
3
4
4
144 CSBGA  
144 CSBGA  
144 CSBGA  
144 CSBGA  
144 CSBGA  
144 CSBGA  
144 CSBGA  
144 CSBGA  
0°C to +70LC  
-40°C to +85LC  
0°C to +70LC  
-40°C to +85LC  
0°C to +70LC  
-40°C to +85LC  
0°C to +70LC  
-40°C to +85LC  
POS/NRZ  
NEG/LCV  
CLK  
CLK  
RECEIVE  
FRAMER  
DATA  
SYNC  
Dallas  
Semiconductor  
DS314x  
Pin Configurations appear at end of data sheet.  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
1 of 88  
REV: 012003  

DS3142N 替代型号

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