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DS26303LN-XXX PDF预览

DS26303LN-XXX

更新时间： 2024-11-06 02:55:47
品牌 Logo 应用领域
美信 - MAXIM PC电信电信集成电路
页数 文件大小 规格书
101页 1197K
描述
3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit

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DS26303LN-XXX 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Active零件包装代码：QFP
包装说明：20 X 20 MM, 1.40 MM HEIGHT, LQFP-144针数：144
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.12Is Samacsys：N
JESD-30 代码：S-PQFP-G144JESD-609代码：e0
长度：20 mm功能数量：1
端子数量：144最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HLFQFP封装形状：SQUARE
封装形式：FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：240
认证状态：Not Qualified座面最大高度：1.6 mm
标称供电电压：3.3 V表面贴装：YES
电信集成电路类型：PCM TRANSCEIVER温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：20 mm
Base Number Matches：1

DS26303LN-XXX 数据手册

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DS26303  
3.3V, E1/T1/J1, Short-Haul,  
Octal Line Interface Unit  
www.maxim-ic.com  
GENERAL DESCRIPTION  
FEATURES  
ꢀ
8 Complete E1, T1, or J1 Short-Haul Line  
Interface Units  
The DS26303 is an 8-channel short-haul line  
interface unit (LIU) that supports E1/T1/J1 from a  
single 3.3V power supply. A wide variety of  
applications are supported through internal  
termination or external termination. A single bill of  
material can support E1/T1/J1 with minimum external  
components. Redundancy is supported through  
nonintrusive monitoring, optimal high-impedance  
modes, and configurable 1:1 or 1+1 backup  
enhancements. An on-chip synthesizer generates the  
E1/T1/J1 clock rates by a single master clock input of  
various frequencies. Two clock output references are  
also offered.  
ꢀ
ꢀ
Independent E1, T1, or J1 Selections  
Internal Software-Selectable Transmit and  
Receive-Side Termination  
ꢀ
ꢀ
Crystal-Less Jitter Attenuator  
Selectable Single-Rail and Dual-Rail Mode  
and AMI or HDB3/B8ZS Line Encoding and  
Decoding  
ꢀ
ꢀ
Detection and Generation of AIS  
Digital/Analog Loss-of-Signal Detection as  
per T1.231, G.775, and ETS 300 233  
ꢀ
External Master Clock can be Multiple of  
2.048MHz or 1.544MHz for T1/J1 or E1  
Operation; This Clock will be Internally  
Adapted for T1 or E1 Use  
APPLICATIONS  
T1 Digital Cross-Connects  
ATM and Frame Relay Equipment  
Wireless Base Stations  
ISDN Primary Rate Interface  
E1/T1/J1 Multiplexer and Channel Banks  
E1/T1/J1 LAN/WAN Routers  
ꢀ
ꢀ
Built-In BERT Tester for Diagnostics  
8-Bit Parallel Interface Support for Intel or  
Motorola Mode or a 4-Wire Serial Interface  
ꢀ
ꢀ
ꢀ
ꢀ
Hardware Mode Interface Support  
Transmit Short-Circuit Protection  
G.772 Nonintrusive Monitoring  
FUNCTIONAL DIAGRAM  
Software Control,  
Hardware Control  
Jtag  
MODESEL  
Specification Compliance to the Latest T1  
and E1 Standards—ANSI T1.102, AT&T Pub  
62411, T1.231, T1.403, ITU-T G.703, G.742,  
G.775, G.823, ETS 300 166, and ETS 300 233  
and JTAG  
RLOS  
RTIP  
RPOS  
RNEG  
RCLK  
ꢀ
ꢀ
ꢀ
Single 3.3V Supply with 5V Tolerant I/O  
JTAG Boundary Scan as per IEEE 1149.1  
144-Pin eLQFP Package  
Receiver  
RRING  
TPOS  
TNEG  
TCLK  
TTTIP  
Transmitter  
TRING  
ORDERING INFORMATION  
1
TEMP RANGE  
PIN-PACKAGE  
PART  
8
DS26303L-XXX  
0°C to +70°C  
144 eLQFP  
DS26303L-XXX+  
DS26303LN-XXX  
DS26303LN-XXX+  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
144 eLQFP  
144 eLQFP  
144 eLQFP  
DS26303  
Note: When XXX is 075, the part defaults to 75Ω impedance in E1  
mode; when XXX is 120, the part defaults to 120Ω impedance.  
+ Denotes a lead-free/RoHS-compliant package.  
e = Exposed Pad.  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
1 of 101  
REV: 053107  
1234567...101

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