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DS1220AB-120-IND PDF预览

DS1220AB-120-IND

更新时间: 2024-01-10 01:05:35
品牌 Logo 应用领域
达拉斯 - DALLAS 静态存储器
页数 文件大小 规格书
9页 139K
描述
16k Nonvolatile SRAM

DS1220AB-120-IND 数据手册

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DS1220AB/AD  
16k Nonvolatile SRAM  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
10 years minimum data retention in the  
absence of external power  
A7  
A6  
A5  
A4  
VCC  
24  
23  
1
A8  
A9  
2
3
4
Data is automatically protected during power  
loss  
Directly replaces 2k x 8 volatile static RAM  
or EEPROM  
Unlimited write cycles  
Low-power CMOS  
JEDEC standard 24-pin DIP package  
Read and write access times as fast as 100 ns  
Lithium energy source is electrically  
disconnected to retain freshness until power  
is applied for the first time  
22  
21  
WE  
OE  
A3  
A2  
20  
19  
5
6
A10  
CE  
DQ7  
DQ6  
A1  
A0  
18  
17  
7
8
DQ0  
9
16  
DQ1  
DQ2  
GND  
10  
DQ5  
DQ4  
DQ3  
15  
14  
11  
12  
13  
24-Pin ENCAPSULATED PACKAGE  
720-mil EXTENDED  
Full ±10% VCC operating range (DS1220AD)  
Optional ±5% VCC operating range  
(DS1220AB)  
Optional industrial temperature range of  
-40°C to +85°C, designated IND  
PIN DESCRIPTION  
A0-A10  
- Address Inputs  
DQ0-DQ7  
- Data In/Data Out  
CE  
- Chip Enable  
- Write Enable  
WE  
OE  
VCC  
GND  
- Output Enable  
- Power (+5V)  
- Ground  
DESCRIPTION  
The DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs  
organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and  
control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition  
occurs, the lithium energy source is automatically switched on and write protection is unconditionally  
enabled to prevent data corruption. The NV SRAMs can be used in place of existing 2k x 8 SRAMs  
directly conforming to the popular bytewide 24-pin DIP standard. The devices also match the pinout of  
the 2716 EPROM and the 2816 EEPROM, allowing direct substitution while enhancing performance.  
There is no limit on the number of write cycles that can be executed and no additional support circuitry is  
required for microprocessor interfacing.  
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111899  

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