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DRA9A14E PDF预览

DRA9A14E

更新时间: 2024-11-07 20:00:23
品牌 Logo 应用领域
松下 - PANASONIC 开关光电二极管晶体管
页数 文件大小 规格书
4页 470K
描述
Small Signal Bipolar Transistor, 0.08A I(C), 50V V(BR)CEO, 1-Element, PNP, Silicon, HALOGEN FREE AND ROHS COMPLIANT, SSMINI3-F3-B, 3 PIN

DRA9A14E 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:SMALL OUTLINE, R-PDSO-F3
针数:3Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8541.21.00.95
风险等级:5.73其他特性:BUILT-IN BIAS RESISTOR RATIO IS 1
最大集电极电流 (IC):0.08 A集电极-发射极最大电压:50 V
配置:SINGLE WITH BUILT-IN RESISTOR最小直流电流增益 (hFE):35
JESD-30 代码:R-PDSO-F3元件数量:1
端子数量:3封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED极性/信道类型:PNP
最大功率耗散 (Abs):0.125 W子类别:BIP General Purpose Small Signal
表面贴装:YES端子形式:FLAT
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

DRA9A14E 数据手册

 浏览型号DRA9A14E的Datasheet PDF文件第2页浏览型号DRA9A14E的Datasheet PDF文件第3页浏览型号DRA9A14E的Datasheet PDF文件第4页 
This product complies with the RoHS Directive (EU 2002/95/EC).  
DRA9A14E  
Silicon PNP epitaxial planar type  
For digital circuits  
Complementary to DRC9A14E  
DRA5A14E in SSMini3 type package  
Features  
Package  
Low collector-emitter saturation voltage VCE(sat)  
Contributes to miniaturization of sets, reduction of component count.  
Eco-friendly Halogen-free package  
Code  
SSMini3-F3-B  
Pin Name  
1: Base  
Packaging  
2: Emitter  
3: Collector  
Embossed type (Thermo-compression sealing): 3000 pcs / reel (standard)  
Marking Symbol: GH  
Internal Connection  
Absolute Maximum Ratings T = 25°C  
a
Parameter  
Collector-base voltage (Emitter open)  
Collector-emitter voltage (Base open)  
Collector current  
Symbol  
VCBO  
VCEO  
IC  
Rating  
–50  
Unit  
V
C
E
R1  
B
–50  
V
R2  
–80  
mA  
mW  
°C  
Total power dissipation  
PT  
125  
R1  
R2  
10  
10  
kΩ  
kΩ  
Resistance value  
Junction temperature  
Tj  
150  
Storage temperature  
T
stg  
–55 to +150  
°C  
Electrical Characteristics T = 25°C±3°C  
a
Parameter  
Symbol  
Conditions  
Min  
–50  
–50  
Typ  
Max  
Unit  
Collector-base voltage (Emitter open)  
Collector-emitter voltage (Base open)  
Collector-base cutoff current (Emitter open)  
Collector-emitter cutoff current (Base open)  
Emitter-base cutoff current (Collector open)  
Forward current transfer ratio  
Collector-emitter saturation voltage  
Input voltage (ON)  
VCBO IC = –10 µA, IE = 0  
VCEO IC = –2 mA, IB = 0  
V
V
ICBO  
ICEO  
IEBO  
hFE  
VCB = –50 V, IE = 0  
VCE = –50 V, IB = 0  
VEB = –6 V, IC = 0  
– 0.1  
– 0.5  
– 0.5  
µA  
µA  
mA  
V
VCE = –10 V, IC = –5 mA  
35  
VCE(sat) IC = –10 mA, IB = – 0.5 mA  
VI(on) VCE = – 0.2 V, IC = –5 mA  
– 0.25  
–2.1  
V
Input voltage (OFF)  
VI(off) VCE = –5 V, IC = –100 µA  
– 0.8  
+30%  
1.2  
V
Input resistance  
R1  
–30%  
0.8  
10  
kΩ  
Resistance ratio  
R1 / R2  
1.0  
Note) Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.  
Publication date: September 2011  
Ver. BED  
1

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