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DP5380N

更新时间： 2024-09-16 22:29:47
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
32页 407K
描述
Asynchronous SCSI Interface (ASI)

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中文翻译

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DP5380N 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP40,.6Reach Compliance Code：unknown
风险等级：5.88地址总线宽度：3
总线兼容性：8051; 16083驱动器接口标准：X3.131; X3T9.2
外部数据总线宽度：8JESD-30 代码：R-PDIP-T40
JESD-609代码：e0长度：52.235 mm
端子数量：40最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP40,.6
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified座面最大高度：5.334 mm
子类别：Bus Controllers最大压摆率：4 mA
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：NO
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：15.24 mm
uPs/uCs/外围集成电路类型：BUS CONTROLLER, SCSIBase Number Matches：1

DP5380N 数据手册

 浏览型号DP5380N的Datasheet PDF文件第2页浏览型号DP5380N的Datasheet PDF文件第3页浏览型号DP5380N的Datasheet PDF文件第4页浏览型号DP5380N的Datasheet PDF文件第5页浏览型号DP5380N的Datasheet PDF文件第6页浏览型号DP5380N的Datasheet PDF文件第7页 
May 1989  
DP5380 Asynchronous SCSI Interface (ASI)  
General Description  
The DP5380 ASI is a CMOS device designed to provide a  
low cost, high performance Small Computer Systems Inter-  
face. It complies with the ANS X3.131-1986 SCSI standard  
as defined by the ANSI X3T9.2 committee. It can act as  
both INITIATOR and TARGET, making it suitable for any  
application. The ASI supports selection, reselection, arbitra-  
tion and all other bus phases. High-current open-drain driv-  
ers on chip reduce application chip count by interfacing di-  
rect to the SCSI bus. An on-chip oscillator provides all tim-  
ing delays.  
to a DMA controller using normal or Block Mode. The ASI  
can be used in either a polled or interrupt-driven environ-  
ment.  
Features  
SCSI Interface  
Y
Supports TARGET and INITIATOR roles  
Y
Parity generation with optional checking  
Y
Arbitration support  
Y
The DP5380 is pin and program compatible with the NMOS  
NCR5380 device. NCR5380 or AM5380 applications can  
use it with no changes to hardware or software. The  
DP5380 is available in a 40-pin DIP or a 44-pin PCC.  
Direct control/monitoring of all SCSI signals  
Y
High current outputs drive SCSI bus directly  
Y
Faster and improved timing  
Y
Very low SCSI bus loading  
The ASI is intended to be used in a microprocessor based  
application, and achieves maximum performance with a  
DMA controller. The device is controlled by reading and  
mP Interface  
Y
Memory or I/O-mapped control transfers  
writing several internal registers. A standard non-multi-  
plexed address and data bus easily fits any mP environment.  
Y
Programmed-I/O or DMA data transfers  
Y
Normal or Block-mode DMA  
Data transfers can be performed by programmed-I/O, pseu-  
do-DMA or via a DMA controller. The ASI easily interfaces  
Y
Fast DMA handshake timing  
Connection Diagram  
Table of Contents  
1.0 FUNCTIONAL DESCRIPTION  
2.0 PIN DESCRIPTION  
3.0 REGISTER DESCRIPTION  
4.0 DEVICE OPERATION  
5.0 INTERRUPTS  
6.0 RESET CONDITIONS  
7.0 APPLICATION GUIDE  
8.0 ABSOLUTE MAXIMUM RATINGS  
9.0 DC ELECTRICAL CHARACTERISTICS  
10.0 AC ELECTRICAL CHARACTERISTICS  
A1 FLOWCHARTS  
A2 REGISTER CHART  
TL/F/9756–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
PALÉ is a registered trademark of and used under license from Monolithic Memories, Inc.  
C
1995 National Semiconductor Corporation  
TL/F/9756  
RRD-B30M115/Printed in U. S. A.  
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