5秒后页面跳转
DM74LS175 PDF预览

DM74LS175

更新时间: 2024-11-05 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 76K
描述
Hex/Quad D-Type Flip-Flops with Clear

DM74LS175 数据手册

 浏览型号DM74LS175的Datasheet PDF文件第2页浏览型号DM74LS175的Datasheet PDF文件第3页浏览型号DM74LS175的Datasheet PDF文件第4页浏览型号DM74LS175的Datasheet PDF文件第5页浏览型号DM74LS175的Datasheet PDF文件第6页浏览型号DM74LS175的Datasheet PDF文件第7页 
August 1992  
Revised April 2000  
DM74LS174 • DM74LS175  
Hex/Quad D-Type Flip-Flops with Clear  
General Description  
Features  
These positive-edge-triggered flip-flops utilize TTL circuitry  
to implement D-type flip-flop logic. All have a direct clear  
input, and the quad (175) versions feature complementary  
outputs from each flip-flop.  
DM74LS174 contains six flip-flops with single-rail  
outputs  
DM74LS175 contains four flip-flops with double-rail  
outputs  
Information at the D inputs meeting the setup time require-  
ments is transferred to the Q outputs on the positive-going  
edge of the clock pulse. Clock triggering occurs at a partic-  
ular voltage level and is not directly related to the transition  
time of the positive-going pulse. When the clock input is at  
either the HIGH or LOW level, the D input signal has no  
effect at the output.  
Buffered clock and direct clear inputs  
Individual data input to each flip-flop  
Applications include:  
Buffer/storage registers  
Shift registers  
Pattern generators  
Typical clock frequency 40 MHz  
Typical power dissipation per flip-flop 14 mW  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS174M  
DM74LS174SJ  
DM74LS174N  
DM74LS175M  
DM74LS175SJ  
DM74LS175N  
M16A  
M16D  
N16E  
M16A  
M16D  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
DM74LS174  
DM74LS175  
© 2000 Fairchild Semiconductor Corporation  
DS006404  
www.fairchildsemi.com  

与DM74LS175相关器件

型号 品牌 获取价格 描述 数据表
DM74LS175J NSC

获取价格

暂无描述
DM74LS175J/A+ ETC

获取价格

Quad D-Type Flip-Flop
DM74LS175M FAIRCHILD

获取价格

Hex/Quad D-Type Flip-Flops with Clear
DM74LS175M NSC

获取价格

Hex/Quad D Flip-Flops with Clear
DM74LS175MX FAIRCHILD

获取价格

Quad D-Type Flip-Flop
DM74LS175N FAIRCHILD

获取价格

Hex/Quad D-Type Flip-Flops with Clear
DM74LS175N NSC

获取价格

Hex/Quad D Flip-Flops with Clear
DM74LS175N/A+ ETC

获取价格

Quad D-Type Flip-Flop
DM74LS175N/B+ ETC

获取价格

Quad D-Type Flip-Flop
DM74LS175SJ FAIRCHILD

获取价格

Hex/Quad D-Type Flip-Flops with Clear