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DM74ALS373SJ PDF预览

DM74ALS373SJ

更新时间: 2024-11-21 05:20:27
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美国国家半导体 - NSC 锁存器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
6页 126K
描述
Octal D-Type TRI-STATE Transparent Latch

DM74ALS373SJ 数据手册

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March 1996  
DM74ALS373  
Octal D-Type TRI-STATE Transparent Latch  
É
General Description  
These 8-bit registers feature totem-pole TRI-STATE outputs  
designed specifically for driving highly-capacitive or relative-  
ly low-impedance loads. The high-impedance state and in-  
creased high-logic-level drive provide these registers with  
the capability of being connected directly to and driving the  
bus lines in a bus-organized system without need for inter-  
face or pull-up components. They are particularly attractive  
for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
state the outputs neither load nor drive the bus lines signifi-  
cantly.  
The output control does not affect the internal operation of  
the latches. That is, the old data can be retained or new  
data can be entered even while the outputs are off.  
Features  
Y
Switching specifications at 50 pF  
Y
Switching specifications guaranteed over full tempera-  
range  
The eight latches of the ALS373 are transparent D-type  
latches. While the enable (G) is high the Q outputs will fol-  
low the data (D) inputs. When the enable is taken low the  
output will be latched at the level of the data that was set  
up.  
ture and V  
CC  
Y
Y
Y
Y
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Functionally and pin for pin compatible with LS TTL  
counterpart  
A buffered output control input can be used to place the  
eight outputs in either a normal logic state (high or low logic  
levels) or a high-impedance state. In the high-impedance  
Improved AC performance over LS373 at approximately  
half the power  
TRI-STATE buffer-type outputs drive bus lines directly  
Connection Diagram  
Dual-In-Line Package  
TL/F/6220–1  
Order Number DM74ALS373WM, DM74ALS373N or DM74ALS373SJ  
See NS Package Number M20B, M20D or N20A  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1996 National Semiconductor Corporation  
TL/F/6220  
RRD-B30M36/Printed in U. S. A.  
http://www.national.com  

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