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DM74ALS373SJX PDF预览

DM74ALS373SJX

更新时间: 2024-11-20 23:47:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 74K
描述
8-Bit D-Type Latch

DM74ALS373SJX 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:5.30 MM, EIAJ TYPE2, SOP-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.39
Is Samacsys:N系列:ALS
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.6 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):27 mAProp。Delay @ Nom-Sup:16 ns
传播延迟(tpd):16 ns认证状态:Not Qualified
座面最大高度:2.1 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

DM74ALS373SJX 数据手册

 浏览型号DM74ALS373SJX的Datasheet PDF文件第2页浏览型号DM74ALS373SJX的Datasheet PDF文件第3页浏览型号DM74ALS373SJX的Datasheet PDF文件第4页浏览型号DM74ALS373SJX的Datasheet PDF文件第5页浏览型号DM74ALS373SJX的Datasheet PDF文件第6页浏览型号DM74ALS373SJX的Datasheet PDF文件第7页 
April 1984  
Revised February 2000  
DM74ALS373  
Octal D-Type 3-STATE Transparent Latch  
General Description  
Features  
These 8-bit registers feature totem-pole 3-STATE outputs  
designed specifically for driving highly-capacitive or rela-  
tively low-impedance loads. The high-impedance state and  
increased high-logic-level drive provide these registers with  
the capability of being connected directly to and driving the  
bus lines in a bus-organized system without need for inter-  
face or pull-up components. They are particularly attractive  
for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
Switching specifications at 50 pF  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Functionally and pin for pin compatible with LS TTL  
counterpart  
Improved AC performance over DM74LS373 at approxi-  
mately half the power  
The eight latches of the DM74ALS373 are transparent D-  
type latches. While the enable (G) is HIGH the Q outputs  
will follow the data (D) inputs. When the enable is taken  
LOW the output will be latched at the level of the data that  
was set up.  
3-STATE buffer-type outputs drive bus lines directly  
A buffered output control input can be used to place the  
eight outputs in either a normal logic state (HIGH or LOW  
logic levels) or a high-impedance state. In the high-imped-  
ance state the outputs neither load nor drive the bus lines  
significantly.  
The output control does not affect the internal operation of  
the latches. That is, the old data can be retained or new  
data can be entered even while the outputs are OFF.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74ALS373WM  
DM74ALS373SJ  
DM74ALS373N  
M20B  
M20D  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
© 2000 Fairchild Semiconductor Corporation  
DS006220  
www.fairchildsemi.com  

DM74ALS373SJX 替代型号

型号 品牌 替代类型 描述 数据表
DM74ALS373WMX FAIRCHILD

完全替代

8-Bit D-Type Latch
DM74ALS373WM FAIRCHILD

类似代替

Octal D-Type 3-STATE Transparent Latch
SN74ALS373ADWR TI

功能相似

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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DM74ALS373WM_NL FAIRCHILD

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DM74ALS373WMX FAIRCHILD

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8-Bit D-Type Latch
DM74ALS373WMX_NL FAIRCHILD

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