是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DIP, DIP14,.3 | Reach Compliance Code: | unknown |
风险等级: | 5.92 | JESD-30 代码: | R-XDIP-T14 |
JESD-609代码: | e0 | 逻辑集成电路类型: | J-K FLIP-FLOP |
最大频率@ Nom-Sup: | 30000000 Hz | 最大I(ol): | 0.004 A |
功能数量: | 2 | 端子数量: | 14 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
封装主体材料: | CERAMIC | 封装代码: | DIP |
封装等效代码: | DIP14,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 电源: | 5 V |
最大电源电流(ICC): | 8 mA | 认证状态: | Not Qualified |
筛选级别: | MIL-STD-883 Class C | 子类别: | FF/Latches |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | TTL | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
触发器类型: | MASTER-SLAVE | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
DM54LS107W/883 | ETC |
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J-K-Type Flip-Flop | |
DM54LS107W/883B | TI |
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IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,FP,14PIN,CERAMIC | |
DM54LS109A | NSC |
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Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | |
DM54LS109AJ | NSC |
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Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | |
DM54LS109AJ/883 | ETC |
获取价格 |
J-K-Type Flip-Flop | |
DM54LS109AM | NSC |
获取价格 |
Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | |
DM54LS109AN | NSC |
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Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | |
DM54LS109AW | NSC |
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J-K-Type Flip-Flop | |
DM54LS109AW/883 | ETC |
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J-K-Type Flip-Flop | |
DM54LS109J/883 | ETC |
获取价格 |
J-K-Type Flip-Flop |