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DIR1703E/2K PDF预览

DIR1703E/2K

更新时间： 2024-09-15 21:17:59
品牌 Logo 应用领域
德州仪器 - TI 光电二极管商用集成电路
页数 文件大小 规格书
19页 236K
描述
SPECIALTY CONSUMER CIRCUIT, PDSO28, PLASTIC, SSOP-28

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中文翻译

获取价格

DIR1703E/2K 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP,针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.81Is Samacsys：N
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：R-PDSO-G28
JESD-609代码：e4长度：10.2 mm
湿度敏感等级：1功能数量：1
端子数量：28最高工作温度：85 °C
最低工作温度：-25 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：2 mm
最大压摆率：40.7 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V表面贴装：YES
温度等级：OTHER端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmBase Number Matches：1

DIR1703E/2K 数据手册

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SLES007– JULY 2001  
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FEATURES  
DESCRIPTION  
D
Standard Digital Audio Interface Receiver  
(EIAJ1201)  
The DIR1703 is a digital audio interface receiver  
(DIR) which receives and decodes audio data up  
to 96 kHz according to the AES/EBU, IEC958,  
S/PDIF, and EIAJCP340/1201 consumer and  
professional format interface standards. The  
DIR1703 demultiplexes the channel status bit and  
user bit directly to serial output pins, and has  
dedicated output pins for the most important  
channel status bits. It also includes extensive  
errors reporting.  
D
D
D
D
Sampling Rate: 32 / 44.1 / 48 / 88.2 / 96 kHz  
Recover 128 / 256 / 384 / 512 f System Clock  
s
Very Low Jitter System Clock Output (75 ps  
Typically)  
On-Chip Master Clock Oscillator, Only an  
External Crystal Is Required:  
24.576 / 22.5792 / 18.432 / 16.9344 / 16.384 /  
12.288 / 11.2896 / 8.192 / 6.144 / 5.6448 /  
4.096 MHz Crystals Are Available  
The significant advantages of the DIR1703 are  
96-kHz sampling rate capability and Low-jitter  
clock recovery by the Sampling Period Adaptive  
Controlled Tracking (SpAct ) system. The input  
signal is reclocked with the patented Sampling  
period Adaptive controlled tracking system for  
maximum quality. These features are required for  
recent consumer and professional audio  
instruments, in which the DIR has an interface to  
any kind of delta-sigma type ADC/DAC with a  
96-kHz sampling rate.  
D
D
D
Selectable Output PCM Audio Data Format  
Selectable Crystal Clock and PPL Clock  
Operation Mode  
Output User Bit Data, Flag Signals, and  
Channel Status Data With Block Start Signal  
D
Single 3.3-V Power Supply  
Package: 28 SSOP  
D
APPLICATIONS  
D
D
D
AV Receiver  
MD Player  
DAC Unit  
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate  
precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SpAct and Burr-Brown are trademarks of Texas Instruments.  
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Copyright 2001, Texas Instruments Incorporated  
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中文翻译

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