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CYISM560BSXC

更新时间： 2024-02-20 00:40:33
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 246K
描述
Clock Generator, 108MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, MS-012, SOIC-8

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CYISM560BSXC 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP,针数：8
Reach Compliance Code：unknown风险等级：5.8
JESD-30 代码：R-PDSO-G8JESD-609代码：e3
长度：4.889 mm湿度敏感等级：1
端子数量：8最高工作温度：70 °C
最低工作温度：最大输出时钟频率：108 MHz
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260主时钟/晶体标称频率：108 MHz
认证状态：COMMERCIAL座面最大高度：1.727 mm
最大供电电压：3.63 V最小供电电压：2.97 V
标称供电电压：3.3 V表面贴装：YES
温度等级：COMMERCIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：3.8985 mmuPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHER
Base Number Matches：1

CYISM560BSXC 数据手册

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SM560  
Pin Definitions  
Pin  
1
Name  
Type  
Description  
Xin/CLK  
VDD  
I
P
P
O
I
Clock or Crystal connection input. Refer to Table 1 for input frequency range selection.  
2
Positive power supply.  
Power supply ground.  
Modulated clock output.  
3
GND  
4
SSCLK  
SSCC  
5
Spread Spectrum Clock Control (Enable/Disable) function. SSCG function is enabled  
when input is high and disabled when input is low. This pin is pulled high internally.  
6
7
8
S1  
S0  
I
I
Tri-level Logic input control pin used to select frequency and bandwidth.  
Frequency/bandwidth selection and Tri-level Logic programming. See Figure 1.  
Tri-level Logic input control pin used to select frequency and bandwidth.  
Frequency/bandwidth selection and Tri-level Logic programming. See Figure 1.  
Xout  
O
Oscillator output pin connected to crystal. Leave this pin unconnected If an external  
clock drives Xin/CLK.  
Functional Description  
The Cypress SM560 is a Spread Spectrum Clock Generator  
(SSCG) IC used for the purpose of reducing Electro Magnetic  
Interference (EMI) found in today’s high-speed digital  
electronic systems.  
one of the nine available Frequency Modulation and Spread%  
ranges. Refer to Table 1 for programming details.  
The SM560 is optimized for SVGA (40 MHz) and XVGA (65  
MHz) Controller clocks and also suitable for the applications  
with the frequency range of 25 to 108 MHz.  
The SM560 uses a Cypress-proprietary Phase-Locked Loop  
(PLL) and Spread Spectrum Clock (SSC) technology to  
synthesize and frequency modulate the input frequency of the  
reference clock. By frequency modulating the clock, the  
measured EMI at the fundamental and harmonic frequencies  
of Clock (SSCLK1) is greatly reduced.  
A wide range of digitally selectable spread percentages is  
made possible by using three-level (High, Low and Middle)  
logic at the S0 and S1 digital control inputs.  
The output spread (frequency modulation) is symmetrically  
centered on the input frequency.  
This reduction in radiated energy can significantly reduce the  
cost of complying with regulatory requirements and time to  
market without degrading the system performance.  
Spread Spectrum Clock Control (SSCC) function enables or  
disables the frequency spread and is provided for easy  
comparison of system performance during EMI testing.  
The SM560 is a very simple and versatile device to use. The  
frequency and spread% range is selected by programming S0  
and S1digital inputs. These inputs use three (3) logic states  
including High (H), Low (L) and Middle (M) logic levels to select  
The SM560 is available in an eight-pin SOIC package with a 0  
to 70°C operating temperature range.  
Table 1. Frequency and Spread% Selection (Center Spread)  
25 – 54 M Hz (Low Range)  
Input  
Frequency  
(M Hz)  
25 – 35  
35 – 40  
40 – 45  
45 – 50  
50 – 54  
S1=M  
S0=M  
(% )  
3.8  
3.5  
3.2  
S1=M  
S0=0  
(% )  
3.2  
3.0  
2.8  
S1=1  
S0=0  
(% )  
2.8  
2.5  
2.4  
S1=0  
S0=0  
(% )  
2.3  
2.1  
1.9  
S1=0  
S0=M  
(% )  
1.9  
1.7  
1.6  
Select the  
Frequency and  
Center Spread %  
desired and then  
set S1, S0 as  
indicated.  
3.0  
2.8  
2.6  
2.4  
2.2  
2.0  
1.8  
1.7  
1.5  
1.4  
50 – 108 M Hz (High Range)  
Input  
Frequency  
(M Hz)  
50 – 60  
60 – 70  
S1=1  
S0=M  
(% )  
2.5  
2.4  
2.3  
S1=0  
S0=1  
(% )  
1.9  
1.8  
1.6  
S1=1  
S0=1  
(% )  
1.2  
1.1  
1.1  
S1=M  
S0=1  
(% )  
1.0  
0.9  
0.9  
Select the  
Frequency and  
Center Spread %  
desired and then  
set S1, S0 as  
indicated.  
70 – 80  
80 – 100  
100 – 108  
2.0  
1.8  
1.4  
1.3  
1.0  
0.8  
0.8  
0.6  
Document #: 38-07020 Rev. *E  
Page 2 of 8  
[+] Feedback  
 
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