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CY8C4245PVA-482 PDF预览

CY8C4245PVA-482

更新时间: 2024-11-05 21:18:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 光电二极管外围集成电路
页数 文件大小 规格书
38页 3109K
描述
Multifunction Peripheral, CMOS, PDSO28, SSOP-28

CY8C4245PVA-482 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SSOP, SSOP28,.3Reach Compliance Code:compliant
ECCN代码:3A991.A.3HTS代码:8542.31.00.01
风险等级:7.45边界扫描:NO
总线兼容性:I2C; IDE; IRDA; LIN; SPI; UARTJESD-30 代码:R-PDSO-G28
长度:10.2 mmI/O 线路数量:24
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP28,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIEDRAM(字数):4000
筛选级别:AEC-Q100座面最大高度:2 mm
最大压摆率:13.8 mA最大供电电压:5.5 V
最小供电电压:1.8 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.8 mm
uPs/uCs/外围集成电路类型:MULTIFUNCTION PERIPHERALBase Number Matches:1

CY8C4245PVA-482 数据手册

 浏览型号CY8C4245PVA-482的Datasheet PDF文件第2页浏览型号CY8C4245PVA-482的Datasheet PDF文件第3页浏览型号CY8C4245PVA-482的Datasheet PDF文件第4页浏览型号CY8C4245PVA-482的Datasheet PDF文件第5页浏览型号CY8C4245PVA-482的Datasheet PDF文件第6页浏览型号CY8C4245PVA-482的Datasheet PDF文件第7页 
Automotive PSoC® 4: PSoC 4200  
Family Datasheet  
Programmable System-on-Chip (PSoC®)  
Programmable System-on-Chip (PSoC®  
)
General Description  
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of mixed-signal programmable embedded system  
controllers with an ARM® Cortex™-M0 CPU, while being AEC-Q100 compliant. It combines programmable and re-configurable analog  
and digital blocks with flexible automatic routing. The PSoC 4200 product family, based on this platform, is a combination of a  
microcontroller with digital programmable logic, high-performance analog-to-digital conversion, opamp with Comparator mode, and  
standard communication and timing peripherals. The PSoC 4200 products will be fully upward compatible with members of the PSoC 4  
platform for new applications and design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning  
of the design.  
Features  
32-bit MCU Sub-system  
Segment LCD Drive  
Automotive Electronics Council (AEC) AEC-Q100 qualified  
48 MHz ARM Cortex-M0 CPU with single cycle multiply  
Up to 32 kB of flash with Read Accelerator  
Up to 4 kB of SRAM  
LCD drive supported on all pins (common or segment)  
Operates in Deep Sleep mode with 4 bits per pin memory  
Serial Communication  
Two independent run-time reconfigurable serial communi-  
cation blocks (SCBs) with reconfigurable I2C, SPI, UART, or  
LIN Slave 1.3, 2.1/2.2 functionality  
Programmable Analog  
One opamp with reconfigurable high-drive external and  
high-bandwidth internal drive, Comparator mode, and ADC  
input buffering capability  
Timing and Pulse-Width Modulation  
Four 16-bit Timer/Counter Pulse-Width Modulator (TCPWM)  
blocks  
12-bit, 1-Msps SAR ADC with differential and single-ended  
modes; Channel Sequencer with signal averaging  
Two current DACs (IDACs) for general-purpose or capacitive  
sensing applications on any pin  
Center-aligned, Edge, and Pseudo-random modes  
Comparator-based triggering of Kill signals for motor drive and  
other high-reliability digital logic applications  
Two low-power comparators that operate in Deep Sleep  
Programmable Digital  
Up to 24 Programmable GPIOs  
Four programmable logic blocks called universal digital blocks,  
(UDBs), each with 8 Macrocells and data path  
28-pin SSOP package  
Any GPIO pin can be CapSense, LCD, analog, or digital  
Drive modes, strengths, and slew rates are programmable  
Cypress-provided peripheral component library, user-defined  
state machines, and Verilog input  
Temperature Ranges:  
A Grade: –40 °C to +85 °C  
S Grade: –40 °C to +105 °C  
Low Power 1.71 to 5.5 V operation  
20-nA Stop Mode with GPIO pin wakeup  
Hibernate and Deep Sleep modes allow wakeup-time versus  
power trade-offs  
PSoC Creator Design Environment  
Capacitive Sensing  
Integrated Development Environment (IDE) provides  
schematic design entry and build (with analog and digital  
automatic routing)  
Cypress Capacitive Sigma-Delta (CSD) provides best-in-class  
SNR (>5:1) and water tolerance  
Applications Programming Interface (API) component for all  
fixed-function and programmable peripherals  
Cypress-supplied software component makes capacitive  
sensing design easy  
Automatic hardware tuning (SmartSense™)  
Industry-Standard Tool Compatibility  
After schematic entry, development can be done with  
ARM-based industry-standard development tools  
Cypress Semiconductor Corporation  
Document Number: 001-93573 Rev. *D  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised July 4, 2016  

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