PSoC® 4: PSoC 4200D Family
Datasheet
Programmable System-on-Chip (PSoC®)
General Description
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an
ARM® Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The
PSoC 4200D product family, based on this platform architecture, is a combination of a microcontroller with digital programmable logic,
programmable interconnect, and standard communication and timing peripherals. The PSoC 4200D products will be fully compatible
with members of the PSoC 4 platform for new applications and design needs. The programmable digital subsystem allows flexibility
and in-field tuning of the design.
Features
32-bit MCU Subsystem
Packages
■ 48 MHz ARM Cortex-M0 CPU with single-cycle multiply
■ Up to 64 kB of flash with Read Accelerator
■ Up to 8 kB of SRAM
■ 25-ball CSP package 2.07 mm × 2.11 mm, 28-SSOP package.
■ Up to 21 programmable GPIOs
■ GPIO drive modes, strengths, and slew rates are program-
mable
■ DMA engine
Programmable Digital
PSoC Creator Design Environment
■ Four programmable logic blocks, each with 8 Macrocells and
an 8-bit data path (called universal digital blocks or UDBs)
■ Integrated Development Environment (IDE) provides
schematic design entry and build (with analog and digital
automatic routing)
■ Programmable I/O block (PRGIO) provides the ability to
perform Boolean functions in the I/O signal path
■ Applications Programming Interface (API component) for all
■ Cypress-provided peripheral component library, user-defined
fixed-function and programmable peripherals
state machines, and Verilog input
Industry-Standard Tool Compatibility
Low Power 1.71 to 5.5 V Operation
■ After schematic entry, development can be done with
ARM-based industry-standard development tools
■ Low-power Deep Sleep Mode with GPIO pin wakeup
Serial Communication
■ Three independent run-time reconfigurable serial communi-
cation blocks (SCBs) with reconfigurable I2C, SPI, or UART
functionality
Timing and Pulse-Width Modulation
■ Four 16-bit timer/counter pulse-width modulator (TCPWM)
blocks
■ Center-aligned, Edge, and Pseudo-random modes
■ Comparator-based triggering of Kill signals for motor drive and
other high-reliability digital logic applications
Cypress Semiconductor Corporation
Document Number: 001-98044 Rev. *C
•
198 Champion Court
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San Jose, CA 95134-1709
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408-943-2600
Revised June 1, 2017