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CY7C960-UM

更新时间： 2024-11-29 22:22:35

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		控制器
页数	文件大小	规格书
10页	252K
描述
Low Cost VMEbus Interface Controller Family

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中文翻译

获取价格

数据手册

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CY7C960-UM 数据手册

fax id: 5603

CY7C960

CY7C961

Low Cost VMEbus Interface

Controller Family

Features

Functional Description

• 80-Mbyte-per-second block transfer rates

• All VME64 transactions provided, including A64/D64,

A40/MD32 transfers

• Auto Slot ID

• CR/CSR space

The CY7C960 Slave VMEbus Interface Controller provides the

board designer with an integrated, full-featured VME64 inter-

face. This 64-pin device can be programmed to handle every

transaction defined in the VME64 specification. The CY7C961

is based upon the CY7C960: additional features include Re-

mote Master capability whereby the CY7C961 can be com-

manded to move data as a VMEbus master. The CY7C961 is

packaged in a 100-pin outline.

• All standard (Rev C)VMEbustransactions implemented

• VMEbus Interrupter

• No local CPU required

The CY7C960 contains all the circuitry needed to control large

DRAM arrays and local I/O circuitry without the intervention of

a local CPU. There are no registers to read or write, no com-

plex command blocks to be constructed in memory. The

CY7C960 simply fetches its own configuration parameters

during the power-on reset period. After reset the CY7C960

responds appropriately to VMEbus activity and controls local

circuitry transparently.

• Programmable from VMEbus, serial PROM, or local bus

• DRAM controller, including refresh

• On-chip DMA controller

• Local I/O controller

• Flexible VMEbus address scheme

• User-configured VMEbus response

• 64-pin TQFP, 10x10mm (CY7C960)

• 100-pin TQFP, 14x14mm (CY7C961)

CY7C960 Logic Block Diagram

REGION[3:0]

LA [7:1]

LOCAL ADDRESS

CONTROLLER

REGION/

AM TABLE

CY7C964CONTROLLER

AM [5:0]

LWORD

POWER-ON

RESET

GENERATOR

SYSRESET*

CLK

CHIP SELECT

OUTPUT PATTERN

TABLE

CS[5:0]

TIMING

GENERATOR

AS*

DS0*

DS1*

VME CONTROL

INTERFACE

DATA BYTE

ENABLE

CONTROLLER

DBE[3:0]

LACK*

DTACK*

WRITE*

DATABYTE

LANE

DECODER

REFRESH

CONTROLLER

IRQ*

IACK*

IACKIN*

IACKOUT*

DRAM

CONTROLLER

LDEN*

PREN*

SWDEN*

R/W

VME INTERRUPT

INTERFACE

LOCAL

CONTROL

CIRCUIT

c960–1

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

December 1994 – Revised December 4, 1997

12 3 4 5 6 7...10

中文翻译

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与CY7C960-UM相关器件

型号	品牌	获取价格	描述	数据表
CY7C960-UMB	CYPRESS	获取价格	Low Cost VMEbus Interface Controller Family
CY7C961	CYPRESS	获取价格	Low Cost VMEbus Interface Controller Family
CY7C961-AC	ETC	获取价格	VME/VMS/VXI/VSB Bus Interface/Controller
CY7C961-NC	CYPRESS	获取价格	Low Cost VMEbus Interface Controller Family
CY7C964	CYPRESS	获取价格	Bus Interface Logic Circuit
CY7C964A	CYPRESS	获取价格	Bus Interface Logic Circuit
CY7C964A-ASC	CYPRESS	获取价格	Bus Interface Logic Circuit
CY7C964-AC	ETC	获取价格	VME/VMS/VXI/VSB Bus Interface/Controller
CY7C964A-NC	CYPRESS	获取价格	Bus Interface Logic Circuit
CY7C964-ASC	CYPRESS	获取价格	Bus Interface Logic Circuit