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CY7C68023_09 PDF预览

CY7C68023_09

更新时间: 2024-11-24 06:51:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 闪存控制器
页数 文件大小 规格书
10页 418K
描述
EZ-USB NX2LP USB 2.0 NAND Flash Controller

CY7C68023_09 数据手册

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CY7C68023/CY7C68024  
EZ-USB NX2LP™ USB 2.0 NAND  
Flash Controller  
43 mA Typical Active Current  
Features  
Space Saving and Pb-free 56-QFN Package (8 mm X 8 mm)  
High (480-Mbps) or Full (12-Mbps) Speed USB Support  
Support for Board-level Manufacturing test through USB  
Interface  
Both Common NAND Page Sizes Supported  
512 bytes — Up to 1 Gbit Capacity  
2K bytes — Up to 8 Gbit Capacity  
3.3V NAND Flash Operation  
NAND Flash Power Management Support  
Eight Chip Enable Pins  
Up to 8 NAND Flash Single Device Chips  
Up to 4 NAND Flash Dual Device Chips  
Introduction  
Industry Standard ECC NAND Flash Correction  
1 bit per 256 correction  
2 bit error detection  
The EZ-USB NX2LP™ (NX2LP) implements a USB 2.0 NAND  
Flash controller. This controller adheres to the Mass Storage  
Class Bulk-Only Transport Specification. The USB port of the  
NX2LP is connected to a host computer directly or through the  
downstream port of a USB hub. Host software issues commands  
and data to the NX2LP and receives status and data from the  
NX2LP using standard USB protocol.  
Industry Standard (SmartMedia) Page Management for Wear  
Leveling Algorithm, Bad Block Handling, and Physical to  
Logical management  
Supports 8-bit NAND Flash Interfaces  
The NX2LP supports industry leading 8-bit NAND Flash inter-  
faces and both common NAND page sizes of 512 and 2k bytes.  
Eight chip enable pins allow the NX2LP to be connected to up to  
eight single or four dual device NAND Flash chips.  
Supports 30 ns, 50 ns, and 100 ns NAND Flash Timing  
Complies with USB Mass Storage Class Specification rev 1.0  
Certain NX2LP features are configurable, enabling the NX2LP to  
meet the needs of different design requirements.  
CY7C68024 Complies with USB 2.0 Specification for  
Bus-Powered Devices (TID# 40460274)  
NX2LP Block Diagram  
Write Protect  
LED2#  
Chip Reset  
LED1#  
24 MHz  
PLL  
Xtal  
EZ-USB NX2LP  
Internal Control Logic  
Control  
NAND Control Signals  
Chip Enable Signals  
8-bit Data Bus  
NAND Flash  
Interface  
Logic  
Smart HS/  
FS USB  
Engine  
VBUS  
D+  
D-  
USB 2.0  
Xceiver  
Data  
Cypress Semiconductor Corporation  
Document #: 38-08055 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 03, 2009  
[+] Feedback  

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