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CY7C68034-56LFXC PDF预览

CY7C68034-56LFXC

更新时间： 2024-11-27 04:53:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 闪存控制器
页数 文件大小 规格书
33页 1526K
描述
EZ-USB NX2LP-Flex⑩ Flexible USB NAND Flash Controller

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CY7C68034-56LFXC 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFN包装说明：8 X 8 MM, LEAD FREE, MO-220, QFN-56
针数：56Reach Compliance Code：unknown
HTS代码：8542.31.00.01风险等级：5.73
主机接口标准：USBJESD-30 代码：S-XQCC-N56
JESD-609代码：e3长度：8 mm
湿度敏感等级：3端子数量：56
最高工作温度：70 °C最低工作温度：
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC56,.31SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：3.3 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Bus Controllers
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：20宽度：8 mm
uPs/uCs/外围集成电路类型：SECONDARY STORAGE CONTROLLER, FLASH MEMORY DRIVEBase Number Matches：1

CY7C68034-56LFXC 数据手册

 浏览型号CY7C68034-56LFXC的Datasheet PDF文件第2页浏览型号CY7C68034-56LFXC的Datasheet PDF文件第3页浏览型号CY7C68034-56LFXC的Datasheet PDF文件第4页浏览型号CY7C68034-56LFXC的Datasheet PDF文件第5页浏览型号CY7C68034-56LFXC的Datasheet PDF文件第6页浏览型号CY7C68034-56LFXC的Datasheet PDF文件第7页 
CY7C68033/CY7C68034  
EZ-USB NX2LP-Flex™ Flexible USB NAND Flash Controller  
• Integrated, industry-standard enhanced 8051  
CY7C68033/CY7C68034 Silicon Features  
— 48-MHz, 24-MHz, or 12-MHz CPU operation  
• Certified compliant for Bus- or Self-powered USB 2.0  
operation (TID# 40490118)  
— Four clocks per instruction cycle  
— Three counter/timers  
• Single-chip, integrated USB 2.0 transceiver and smart SIE  
• Ultra low power – 43 mA typical current draw in any mode  
• Enhanced 8051 core  
— Expanded interrupt system  
— Two data pointers  
— Firmware runs from internal RAM, which is downloaded  
from NAND flash at startup  
• 3.3V operation with 5V tolerant inputs  
• Vectored USB interrupts and GPIF/FIFO interrupts  
— No external EEPROM required  
• 15 KBytes of on-chip Code/Data RAM  
— Default NAND firmware ~8 kB  
— Default free space ~7 kB  
• Separate data buffers for the Set-up and Data portions of a  
CONTROL transfer  
• Integrated I2C™ controller, runs at 100 or 400 kHz  
• Four integrated FIFOs  
— Integrated glue logic and FIFOs lower system cost  
— Automatic conversion to and from 16-bit buses  
— Master or slave operation  
• Four programmable BULK/INTERRUPT/ISOCHRONOUS  
endpoints  
— Buffering options: double, triple, and quad  
• Additional programmable (BULK/INTERRUPT) 64-byte  
endpoint  
— Uses external clock or asynchronous strobes  
— Easy interface to ASIC and DSP ICs  
• Available in space saving, 56-pin QFN package  
• SmartMedia Standard Hardware ECC generation with 1-bit  
correction and 2-bit detection  
CY7C68034 Only Silicon Features:  
• Ideal for battery powered applications  
— Suspend current: 100 μA (typ.)  
• GPIF (General Programmable Interface)  
— Allows direct connection to most parallel interfaces  
— Programmable waveform descriptors and configuration  
registers to define waveforms  
CY7C68033 Only Silicon Features:  
• Ideal for non-battery powered applications  
— Suspend current: 300 μA (typ.)  
— SupportsmultipleReady(RDY)inputsandControl(CTL)  
outputs  
• 12 fully-programmable GPIO pins  
High-performance,  
enhanced 8051 core  
with low power options  
24 MHz  
Ext. Xtal  
Block Diagram  
NX2LP-Flex  
/0.5  
/1.0  
/2.0  
8051 Core  
x20  
2
12/24/48 MHz,  
four clocks/cycle  
PLL  
I C  
Master  
V
CC  
Connected for  
full-speed USB  
Additional I/Os  
1.5k  
NAND  
Boot Logic  
(ROM)  
GeneralProgrammable  
I/F to ASIC/DSP or bus  
standards such as 8-bit  
GPIF  
NAND, EPP, etc.  
RDY (2)  
CTL (3)  
USB  
2.0  
XCVR  
D+  
D–  
15 kB  
RAM  
CY  
Smart  
USB  
ECC  
1.1/2.0  
Engine  
Up to 96 MB/s burst rate  
Integrated full- and  
high-speed XCVR  
4 kB  
8/16  
FIFO  
‘Soft Configuration’ enables  
easy firmware changes  
FIFO and USB endpoint memory  
(master or slave modes)  
Enhanced USB core  
simplifies 8051 code  
Cypress Semiconductor Corporation  
Document #: 001-04247 Rev. *D  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised September 21, 2006  
[+] Feedback  
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