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CY7C68014A-100AXC PDF预览

CY7C68014A-100AXC

更新时间: 2024-11-23 22:09:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 总线控制器微控制器和处理器外围集成电路数据传输可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
55页 1861K
描述
EZ-USB FX2LP USB Microcontroller

CY7C68014A-100AXC 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFP
包装说明:LQFP, QFP100,.63X.87针数:100
Reach Compliance Code:compliantECCN代码:3A991.A.3
HTS代码:8542.31.00.01Factory Lead Time:1 week
风险等级:2.17Is Samacsys:N
具有ADC:NO地址总线宽度:
位大小:8总线兼容性:I2C; UART; USB
CPU系列:8051最大时钟频率:24 MHz
DAC 通道:NODMA 通道:NO
最大数据传输速率:60 MBps外部数据总线宽度:
JESD-30 代码:R-PQFP-G100JESD-609代码:e3
长度:20 mm湿度敏感等级:3
I/O 线路数量:40端子数量:100
最高工作温度:70 °C最低工作温度:
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP100,.63X.87
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not QualifiedRAM(字节):16384
ROM(单词):0ROM可编程性:EEPROM
座面最大高度:1.6 mm速度:48 MHz
子类别:Microcontrollers最大压摆率:85 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:20宽度:14 mm
uPs/uCs/外围集成电路类型:BUS CONTROLLER, UNIVERSAL SERIAL BUSBase Number Matches:1

CY7C68014A-100AXC 数据手册

 浏览型号CY7C68014A-100AXC的Datasheet PDF文件第2页浏览型号CY7C68014A-100AXC的Datasheet PDF文件第3页浏览型号CY7C68014A-100AXC的Datasheet PDF文件第4页浏览型号CY7C68014A-100AXC的Datasheet PDF文件第5页浏览型号CY7C68014A-100AXC的Datasheet PDF文件第6页浏览型号CY7C68014A-100AXC的Datasheet PDF文件第7页 
CY7C68013A/CY7C68014A  
CY7C68015A/CY7C68016A  
EZ-USB FX2LP™ USB Microcontroller  
Integrated, industry-standard enhanced 8051  
1.0  
Features (CY7C68013A/14A/15A/16A)  
— 48-MHz, 24-MHz, or 12-MHz CPU operation  
— Four clocks per instruction cycle  
— Two USARTS  
• USB 2.0–USB-IF high speed certified (TID # 40440111)  
• Single-chip integrated USB 2.0 transceiver, smart SIE,  
and enhanced 8051 microprocessor  
— Three counter/timers  
• Fit, form and function compatible with the FX2  
— Expanded interrupt system  
— Two data pointers  
— Pin-compatible  
— Object-code-compatible  
3.3V operation with 5V tolerant inputs  
— Functionally-compatible (FX2LP is a superset)  
Vectored USB interrupts and GPIF/FIFO interrupts  
• Ultra Low power: I no more than 85 mA in any mode  
CC  
Separate data buffers for the Set-up and Data portions  
of a CONTROL transfer  
— Ideal for bus and battery powered applications  
• Software: 8051 code runs from:  
2
Integrated I C controller, runs at 100 or 400 kHz  
— Internal RAM, which is downloaded via USB  
— Internal RAM, which is loaded from EEPROM  
— External memory device (128 pin package)  
• 16 KBytes of on-chip Code/Data RAM  
Four integrated FIFOs  
— Integrated glue logic and FIFOs lower system cost  
— Automatic conversion to and from 16-bit buses  
— Master or slave operation  
• Four programmable BULK/INTERRUPT/ISOCHRO-  
NOUS endpoints  
— Uses external clock or asynchronous strobes  
— Easy interface to ASIC and DSP ICs  
— Buffering options: double, triple, and quad  
• Additional programmable (BULK/INTERRUPT) 64-byte  
endpoint  
1.1  
Features (CY7C68013A/14A only)  
• CY7C68014A: Ideal for battery powered applications  
— Suspend current: 100 µA (typ)  
• 8- or 16-bit external data interface  
• Smart Media Standard ECC generation  
• GPIF (General Programmable Interface)  
— Allows direct connection to most parallel interface  
• CY7C68013A: Ideal for non-battery powered applica-  
tions  
— Suspend current: 300 µA (typ)  
• Available in four lead-free packages with up to 40 GPIOs  
— Programmable waveform descriptors and configu-  
ration registers to define waveforms  
— 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs),  
56-pin QFN (24 GPIOs) and 56-pin SSOP (24 GPIOs)  
— Supports multiple Ready (RDY) inputs and Control  
(CTL) outputs  
High-performance micro  
using standard tools  
24 MHz  
Ext. XTAL  
with lower-power options  
FX2LP  
2
/0.5  
/1.0  
/2.0  
I C  
8051 Core  
x20  
Master  
VCC  
12/24/48 MHz,  
four clocks/cycle  
PLL  
Abundant I/O  
including two USARTS  
Additional I/Os (24)  
1.5k  
connected for  
full speed  
General  
ADDR (9)  
programmable I/F  
to ASIC/DSP or bus  
standards such as  
D+  
D–  
GPIF  
USB  
2.0  
XCVR  
CY  
Smart  
USB  
16 KB  
RAM  
RDY (6)  
CTL (6)  
ATAPI, EPP, etc.  
ECC  
1.1/2.0  
Engine  
Integrated  
full- and high-speed  
XCVR  
Up to 96 MBytes/s  
burst rate  
4 kB  
FIFO  
8/16  
Enhanced USB core  
Simplifies 8051 code  
“Soft Configuration”  
Easy firmware changes  
FIFO and endpoint memory  
(master or slave operation)  
Figure 1-1. Block Diagram  
Cypress Semiconductor Corporation  
Document #: 38-08032 Rev. *G  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Revised February 1, 2005  

CY7C68014A-100AXC 替代型号

型号 品牌 替代类型 描述 数据表
CY7C68013A-100AXI CYPRESS

类似代替

EZ-USB FX2LP⑩ USB Microcontroller
CY7C68013A-100AXC CYPRESS

类似代替

EZ-USB FX2LP USB Microcontroller
CY7C68013-100AC CYPRESS

功能相似

EZ-USB FX2⑩ USB Microcontroller High-speed US

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