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CY7C131BV18 PDF预览

CY7C131BV18

更新时间： 2024-11-20 06:51:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 双倍数据速率
页数 文件大小 规格书
8页 244K
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RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

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CY7C131BV18 数据手册

 浏览型号CY7C131BV18的Datasheet PDF文件第2页浏览型号CY7C131BV18的Datasheet PDF文件第3页浏览型号CY7C131BV18的Datasheet PDF文件第4页浏览型号CY7C131BV18的Datasheet PDF文件第5页浏览型号CY7C131BV18的Datasheet PDF文件第6页浏览型号CY7C131BV18的Datasheet PDF文件第7页 
CY7C129*DV18/CY7C130*DV25  
CY7C130*BV18/CY7C130*BV25/CY7C132*BV25  
CY7C131*BV18 / CY7C132*BV18/CY7C139*BV18  
CY7C191*BV18/CY7C141*AV18 / CY7C142*AV18/  
CY7C151*V18 /CY7C152*V18  
Errata Revision: *C  
May 02, 2007  
RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata  
This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for  
QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability.  
This document should be used to compare to the respective datasheet for the devices to fully describe the device  
functionality.  
Please contact your local Cypress Sales Representative for availability of the fixed devices and any other questions.  
Devices Affected  
Density & Revision  
9Mb - Ram9(90 nm)  
9Mb - Ram9(90 nm)  
18Mb - Ram9(90nm)  
Part Numbers  
CY7C130*DV25  
CY7C129*DV18  
Architecture  
QDRI/DDRI  
QDRII  
CY7C130*BV18  
CY7C130*BV25  
CY7C132*BV25  
QDRI/DDRI  
18Mb - Ram9(90nm)  
CY7C131*BV18  
CY7C132*BV18  
CY7C139*BV18  
CY7C191*BV18  
QDRII/DDRII  
36Mb - Ram9(90nm)  
72Mb -Ram9(90nm)  
CY7C141*AV18  
CY7C142*AV18  
QDRII/DDRII  
QDRII/DDRII  
CY7C151*V18  
CY7C152*V18  
Table 1. List of Affected devices  
Product Status  
All of the above densities and revisions are available in sample as well as production quantities.  
QDR/DDR DOFF Pin, Output Buffer and JTAG Issues Errata Summary  
The following table defines the issues and the fix status for the different devices which are affected.  
Item  
1.  
Issue  
Device  
Fix Status  
9Mb - “D” Rev - Ram9 The fix involved removing the in-  
18Mb - “B” Rev - Ram9 ternal pull-down resistor on the  
36Mb - “A” Rev - Ram9 DOFF pin. The fix has been im-  
DOFF pin is used for enabling/dis-  
abling the DLL circuitry within the  
SRAM. To enable the DLL circuitry,  
DOFF pin must be externally tied  
HIGH. The QDR-II/DDR-II devices  
have an internal pull down resistor of  
~5KΩ . The value of the external pull-  
72Mb - Ram9  
plemented on the new revision  
and is now available.  
QDR-II/DDR-II Devices  
up resistor should be 500Ω or less in  
order to ensure DLL is enabled.  
Cypress Semiconductor Corporation  
Document #: 001-06217 Rev. *C  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised:- May 02, 2007  
12345678

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