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CY7C1150V18-333BZI PDF预览

CY7C1150V18-333BZI

更新时间： 2024-02-08 11:47:28
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器双倍数据速率时钟
页数 文件大小 规格书
27页 1126K
描述
18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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CY7C1150V18-333BZI 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LBGA, BGA165,11X15,40针数：165
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.32
最长访问时间：0.45 ns其他特性：PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)：333 MHzI/O 类型：COMMON
JESD-30 代码：R-PBGA-B165JESD-609代码：e1
长度：15 mm内存密度：18874368 bit
内存集成电路类型：DDR SRAM内存宽度：36
湿度敏感等级：3功能数量：1
端子数量：165字数：524288 words
字数代码：512000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：512KX36输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：LBGA
封装等效代码：BGA165,11X15,40封装形状：RECTANGULAR
封装形式：GRID ARRAY, LOW PROFILE并行/串行：PARALLEL
峰值回流温度（摄氏度）：260电源：1.5/1.8,1.8 V
认证状态：Not Qualified座面最大高度：1.4 mm
最大待机电流：0.26 A最小待机电流：1.7 V
子类别：SRAMs最大压摆率：0.92 mA
最大供电电压 (Vsup)：1.9 V最小供电电压 (Vsup)：1.7 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形式：BALL
端子节距：1 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：20宽度：13 mm
Base Number Matches：1

CY7C1150V18-333BZI 数据手册

 浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第21页浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第22页浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第23页浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第24页浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第25页浏览型号CY7C1150V18-333BZI的Datasheet PDF文件第26页 
CY7C1146V18  
CY7C1157V18  
CY7C1148V18  
CY7C1150V18  
Document History Page  
Document Title: CY7C1146V18/CY7C1157V18/CY7C1148V18/CY7C1150V18, 18-Mbit DDR-II+ SRAM 2-Word Burst  
Architecture (2.0 Cycle Read Latency)  
Document Number: 001-06621  
Orig. of  
Change  
REV.  
ECN No. Issue Date  
Description of Change  
**  
430351  
461654  
See ECN  
See ECN  
NXR  
New data sheet  
*A  
NXR  
Revised the MPNs from  
CY7C1157BV18 to CY7C1146V18  
CY7C1148BV18 to CY7C1157V18  
CY7C1150BV18 to CY7C1148V18  
Changed tTH and tTL from 40 ns to 20 ns, changed tTMSS, tTDIS, tCS, tTMSH, tTDIH  
,
t
CH from 10 ns to 5 ns and changed tTDOV from 20 ns to 10 ns in TAP AC  
Switching Characteristics table  
Modified Power Up waveform  
*B  
497629  
See ECN  
NXR  
Changed the VDDQ operating voltage to 1.4V to VDD in the Features section, in  
Operating Range table and in the DC Electrical Characteristics table  
Added foot note in page 1  
Changed the Maximum rating of Ambient Temperature with Power Applied from  
–10°C to +85°C to –55°C to +125°C  
Changed VREF (max) spec from 0.85V to 0.95V in the DC Electrical Character-  
istics table and in the note below the table  
Updated note 21 to specify Overshoot and Undershoot Spec  
Updated ΘJA and ΘJC values  
Removed x9 part and its related information  
Updated foot note 24  
*C  
1175245  
See ECN VKN/KKVTMP Converted from preliminary to final  
Added x8 and x9 parts  
Updated logic block diagram for x18 and x36 parts  
Changed IDD values from 794 mA to 1020 mA for 375 MHz, 733 mA to 920 mA  
for 333 MHz, 685 mA to 850 mA for 300 MHz  
Changed ISB values from 227 mA to 290 mA for 375 MHz, 212 mA to 260 mA  
for 333 MHz, 201 mA to 250 mA for 300 MHz  
Changed tCYC(max) spec to 8.4 ns for all speed bins  
Changed ΘJA value from 13.48 °C/W to 17.2 °C/W  
Updated Ordering Information table  
© Cypress Semiconductor Corporation, 2006-2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used  
for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use  
as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support  
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),  
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,  
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress  
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without  
the express written permission of Cypress.  
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES  
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not  
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where  
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer  
assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
Use may be limited by and subject to the applicable Cypress software license agreement.  
Document Number: 001-06621 Rev. *C  
Revised June 21, 2007  
Page 27 of 27  
QDR™ is a trademark of Cypress Semiconductor Corp. QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress, IDT, NEC, Renesas, and Samsung. All  
product and company names mentioned in this document are the trademarks of their respective holders.  
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CY7C1150V18-375BZI CYPRESS 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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CY7C1150V18-375BZXC CYPRESS 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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CY7C1150V18-375BZXI CYPRESS 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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