Datasheet > CY7C1069DV33_07

CY7C1069DV33_07

更新时间： 2024-11-09 05:09:31

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
10页	515K
描述
16-Mbit (2M x 8) Static RAM

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CY7C1069DV33_07 数据手册

CY7C1069DV33

16-Mbit (2M x 8) Static RAM

Features

Functional Description

■ High speed

❐ t_AA= 10 ns

The CY7C1069DV33 is a high performance CMOS Static RAM

organized as 2,097,152 words by 8 bits.

To write to the device, take Chip Enables (CE₁LOW and CE₂

HIGH) and Write Enable (WE) input LOW. Data on the eight IO

pins (IO₀through IO₇) is then written into the location specified

on the address pins (A₀through A₂₀).

■ Low active power

❐ I_CC= 175 mA at 10 ns

■ Low CMOS standby power

❐ I_SB2= 25 mA

To read from the device, take Chip Enables (CE₁LOW and CE₂

HIGH) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. Under these conditions, the contents of the

memory location specified by the address pins will appear on the

IO pins. See Truth Table on page 8 for a complete description of

Read and Write modes.

■ Operating voltages of 3.3 ± 0.3V

■ 2.0V data retention

■ Automatic power down when deselected

■ TTL compatible inputs and outputs

■ Easy memory expansion with CE₁and CE₂features

The input and output pins (IO₀through IO₇) are placed in a high

impedance state when the device is deselected (CE₁HIGH or

CE₂LOW), the outputs are disabled (OE HIGH), or during a write

operation (CE₁LOW, CE₂HIGH, and WE LOW).

■ Available in Pb-free 54-Pin TSOP II and 48-Ball VFBGA

packages

The CY7C1069DV33 is available in a 54-pin TSOP II package

with center power and ground (revolutionary) pinout, and a

48-Ball very fine pitch ball grid array (VFBGA) package.

Logic Block Diagram

INPUT BUFFER

A₀

A₁

A₂

A₃

IO₀– IO₇

2M x 8

A₄

ARRAY

A₅

A₆

A₇

A₈

A₉

CE₂

COLUMN

DECODER

CE₁

Cypress Semiconductor Corporation

Document Number: 38-05478 Rev. *D

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised September 06, 2007

12 3 4 5 6 7...10

中文翻译

下载PDF

与CY7C1069DV33_07相关器件

型号	品牌	获取价格	描述	数据表
CY7C1069DV33-10BAXI	CYPRESS	获取价格	Standard SRAM, 2MX8, 10ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48
CY7C1069DV33-10BVXI	CYPRESS	获取价格	16-Mbit (2M x 8) Static RAM
CY7C1069DV33-10BVXIT	CYPRESS	获取价格	Standard SRAM, 2MX8, 10ns, CMOS, PBGA48, 8 X 9.50 MM, 1 MM HEIGHT, LEAD FREE, FBGA-48
CY7C1069DV33-10ZSXI	CYPRESS	获取价格	16-Mbit (2M x 8) Static RAM
CY7C1069DV33-10ZSXIT	CYPRESS	获取价格	暂无描述
CY7C1069DV33-10ZXI	CYPRESS	获取价格	16-Mbit (2M x 8) Static RAM
CY7C1069G	CYPRESS	获取价格	16-Mbit (2M words Ã 8 bit) Static RAM with E
CY7C1069G-10BVXI	CYPRESS	获取价格	16-Mbit (2M words Ã 8 bit) Static RAM with E
CY7C1069G-10BVXI	INFINEON	获取价格	Asynchronous SRAM
CY7C1069G-10BVXIT	CYPRESS	获取价格	16-Mbit (2M words Ã 8 bit) Static RAM with E