CY28416

更新时间： 2024-09-18 09:41:43

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
15页	276K
描述
Next Generation FTG for Intel-R Architecture

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中文翻译

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数据手册

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CY28416 数据手册

PRELIMINARY

CY28416

Next Generation FTG for Intel® Architecture

• Two 33-MHz PCI Free Running Clocks

Features

• Supports Intel Pentium^®4-Type CPUs

• Selectable CPU Frequencies

• Low Voltage Frequency Select Input

• I²C Support Byte/Word/Block Read/Write Capabilities

• Ideal Lexmark Spread Spectrum Profile for Maximum

• Two Differential CPU Clock Pairs

EMI Reduction

• Four 100-MHz Differential SRC Clock Pairs

• One CPU/SRC Selectable Differential Clock Pair

• One 96-MHz Differential Dot Clock Support

• Two 48-MHz Clocks

• 3.3V Power Supply

• 48-pin SSOP Package

CPU

x2 / x3

SRC

x4 / x5

PCI

x 6

DOT

x 1

USB

x 2

REF

x 2

• Four 33-MHz PCI Clocks

Block Diagram

Pin Configuration

VDD_REF

XIN

XOUT

XTAL

OSC

REF

SCLK

SDATA

XOUT

VSS_CPU

PLL Ref Freq

CPUT0

CPUC0

VDD_CPU

CPUT1

CPUC1

IREF

VDD_CPU

CPUT[0:1], CPUC[0:1],

Divider

PLL1

CPU2/SRC4

Network

XIN

VDD_SRC

SRCT[0:3], SRCC[0:3]

VSS_REF

REF1/FS_A

REF0/FS_C

VDD_REF

PCI0

PCI1

VDD_PCI

VSS_PCI

PCI2

FS_[C:A]

VTT_PWRGD#

IREF

VSSA

VDDA

VDD_PCI

PCI[0:3]

VDD_PCIF

PCIF[0:1]

CPUT2_ITP/SRCT4

CPUC2_ITP/SRCC4

VDD_SRC

VSS_SRC

SRCT3

VDD_48MHz

PCI3

VSS_PCI

VDD_PCI

DOT96T

DOT96C

PLL2

SRCC3

VDD_SRC

SRCC2_SATA

SRCT2_SATA

SRCC1

SRCT1

VSS_SRC

SRCC0

SRCT0

48MHz0

48MHz1

PCIF0/TESTSEL

PCIF1/ITPEN

VDD_48

48MHz0/FS_B

48MHz1

VSS_48

DOT96T

DOT96C

SDATA

SCLK

I C

Logic

VTT_PWRGD#/PD

48-PIN SSOP

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07657 Rev. *A

RevisedFebruary2, 2005

12 3 4 5 6 7...15

中文翻译

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