CY28419ZC

更新时间： 2024-09-18 09:41:43

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟
页数	文件大小	规格书
16页	275K
描述
Clock Synthesizer with Differential SRC and CPU Outputs

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数据手册

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CY28419ZC 数据手册

CY28419

Clock Synthesizer with Differential SRC and

CPU Outputs

• Four differential CPU clock pairs

• One differential SRC clock

Features

• CK409B-compliant

• I²C support with readback capabilities

• Supports Intel Pentium^4-type CPUs

• Selectable CPU frequencies

• 3.3V power supply

• Ideal Lexmark Spread Spectrum profile for maximum

electromagnetic interference (EMI) reduction

• 56-pin SSOP package

• Ten copies of PCI clocks

CPU

x 4

SRC

x 1

3V66

x 5

PCI

REF

x 2

48M

x 2

• Two copies 48-mHz clock

• Five copies of 3V66 with one optional VCH

x 10

[1]

Block Diagram

Pin Configuration

VDD_REF

REF0:1

REF_0

REF_1

VDD_REF

XIN

FS_B

XIN

XTAL

OSC

VDD_A

VSS_A

XOUT

PLL Ref Freq

VDD_CPU

CPUT(0:3), CPUC(0:3)

VSS_IREF

IREF

Divider

PLL 1

XOUT

Network

VDD_SRC

SRCT, SRCC

VSS_REF

PCIF0

FS_A

CPUT3

CPUC3

VDD_CPU

CPUT2

CPUC2

VSS_CPU

CPUT1

CPUC1

VDD_CPU

CPUT0

CPUC0

VSS_SRC

SRCT

FS_(A:B)

VTT_PWRGD#

PCIF1

PCIF2

IREF

VDD_PCI

VSS_PCI

PCI0

VDD_3V66

3V66_(0:3)

PCI1

VDD_PCI

PCIF(0:2)

PLL2

PCI2

PCI3

PCI(0:6)

VDD_PCI

VSS_PCI

PCI4

3V66_4/VCH

PCI5

PCI6

SRCC

VDD_48MHz

DOT_48

USB_48

PD#

VDD_SRC

PD#

3V66_0

3V66_1

VDD_3V66

VSS_3V66

3V66_2

3V66_3

SCLK

VTT_PWRGD#

VDD_48

VSS_48

DOT_48

USB_48

SDATA

SCLK

I C

Logic

SDATA

3V66_4/VCH

SSOP-56

Note:

1. Signals marked with [*] and [**] have internal pull-up and pull-down resistors, respectively.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Document #: 38-07444 Rev. *D

Revised February 05, 2004

12 3 4 5 6 7...16

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