PRELIMINARY
CY14B256K
256-Kbit (32K x 8) nvSRAM with Real-Time-Clock
Features
Functional Description
• Data integrity of Cypress nvSRAM combined with full
featured real time clock
The Cypress CY14B256K combines a 256 Kbit nonvolatile
static RAM with a full featured real-time-clock in a monolithic
integrated circuit. The embedded nonvolatile elements
incorporate QuantumTrap technology producing the world’s
most reliable nonvolatile memory. The SRAM can be read and
written an infinite number of times, while independent,
nonvolatile data resides in the nonvolatile elements.
— Low power, 300 nA Max, RTC current
— Capacitor or battery backup for RTC
• Watchdog timer
• Clock alarm with programmable interrupts
• 25 ns, 35 ns, and 45 ns access times
The real-time-clock function provides an accurate clock with
leap year tracking and a programmable, high accuracy
oscillator. The alarm function is programmable for one time
alarms or periodic seconds, minutes, hours, or days. There is
also a programmable watchdog timer for process control.
• “Hands-off” automatic STORE on power down with only a
small capacitor
• STOREtoQuantumTrap™initiatedbysoftware, devicepin,
or on power down
• RECALL to SRAM initiated by software or on power up
• Infinite READ, WRITE, and RECALL cycles
• High reliability
— Endurance to 200K cycles
— Data retention: 20 years @ 55°C
• 10 mA typical ICC at 200 ns cycle time
• Single 3V operation with tolerance of +15%, -10%
• Commercial and industrial temperature
• SSOP Package (ROHS compliant)
Logic Block Diagram
V
CC
V
CAP
QuantumTrap
512 X 512
V
RTCbat
POWER
A5
STORE
CONTROL
V
RTCcap
A6
A7
A8
RECALL
STORE/
RECALL
CONTROL
STATIC RAM
ARRAY
512 X 512
HSB
A9
A11
A12
A13
A14
SOFTWARE
DETECT
A13
-
A0
DQ0
COLUMN IO
DQ1
DQ2
DQ3
COLUMN DEC
x1
x2
RTC
MUX
INT
DQ4
DQ5
DQ6
DQ7
A0
A4
A10
A1
A3
A2
A14
-
A0
OE
CE
WE
Cypress Semiconductor Corporation
Document Number: 001-06431 Rev. *E
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised January 29, 2007
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