Datasheet > CS62LS4008FI

CS62LS4008FI

更新时间： 2022-12-01 12:20:02

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
11页	484K
描述
Low Power CMOS SRAM 512K X 8 Bits

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数据手册

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CS62LS4008FI 数据手册

Low Power CMOS SRAM

512K X 8 Bits

UC62LS4008

-20/-25

ꢀSWITCHING WAVEFORMS (READ CYCLE)

READ CYCLE1 ^(1,2,4)

t_RC

ADDRESS

D_OUT

t_AA

t_OH

READ CYCLE2 ^(1,3,4)

t_CE

(5)

t_CLZ

t_CHZ

D_OUT

READ CYCLE3 ^(1,4)

t_RC

ADDRESS

t_AA

t_OH

(1,5)

t_OE

t_OHZ

t_OLZ

t_CE

(5)

t_CLZ

t_CHZ

D_OUT

NOTES:

1. WE\ is high in read cycle.

2. Device is continuously selected when CE\ = VIL

3. Address valid prior to or coincident with CE\ transition low.

4. OE\ = VIL.

5. Transition is measured ±500mV from steady state with CL=5pF as shown in Figure 1B. The

parameter is guaranteed but not 100% tested.

U-Chip Technology Corp. LTD. .

Preliminary Rev.1.0

Reserves the right to modify document contents without notice.

PAGE 5

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