Low Power CMOS SRAM
512K X 8 Bits
UC62LS4008
-20/-25
ꢀDC ELECTRICAL CHARACTERISTICS (TA=0℃to 70℃)
Test Condition
Symbol
VIL
Comment
MIN.
TYP.(1)
MAX.
UNITS
V
Guaranteed Input Low
VCC=2.4V
-0.5
-
-
0.8
Voltage(2)
Guaranteed Input High
Voltage(2)
VIH
VCC=3.6V
2.0
Vcc-0.2
V
IL
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
VCC=3.6V VIN=0V to VCC
-
-
1
1
uA
uA
V
VCC=3.6V CE\=VIH or OE\=VIH
VIO=0V t VCC
IOL
-
-
VOL
VOH
ICC
VCC=3.6V, IOL=2mA
-
2.4
-
-
0.4
-
VCC=3.0V, IOH=-1mA
-
V
Operating Power Supply
Current
CE\=VIL,IDQ=0mA, F=Fmax(3)
CE\=VIH, VIN=VIH to VIL
-
20
1
mA
mA
uA
ISB1
ISB2
TTL Standby Current
-
-
CE\≧VCC-0.2V, VIN=VCC-0.2V
to 0.2V
CMOS Standby Current
-
2
10
1. Typical characteristics are at TA = 25oC.
2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
3. Fmax = 1/tRC .
ꢀDATA RETENTION CHARACTERISTICS ( TA=0℃to 70℃)
Symbol
Comment
Test Condition
MIN.
1.2
-
TYP.(1)
MAX.
UNITS
V
CE\≧VCC - 0.2V
VIN≧VCC-0.2V or VIN≦0.2V
CE\≧VCC - 0.2V
VIN≧VCC-0.2V or VIN≦0.2V
VCC to Data Retention
Data Retention Current
VDR
-
0.1
-
-
1
-
ICCDR
tDR
uA
ns
Chip Deselect to Data
Retention Time
0
See Retention Waveform
(2)
Operation Recovery Time
tR
TRC
-
-
ns
1. VCC = 1.5V, TA = 25℃.
2. tRC = Read Cycle Time
ꢀLOW VCC DATA RETENTION WAVEFORM(1) (CE\ Controlled)
Data Retention Mode
VDR >= 1. 2V
Vcc
tCDR
VIH
tR
VIH
CE >= VCC - 0. 2V
CE
U-Chip Technology Corp. LTD. .
Preliminary Rev.1.0
Reserves the right to modify document contents without notice.
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