Datasheet > CS62LS4008FI

CS62LS4008FI

更新时间： 2022-12-01 12:20:02

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
11页	484K
描述
Low Power CMOS SRAM 512K X 8 Bits

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中文翻译

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数据手册

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CS62LS4008FI 数据手册

Low Power CMOS SRAM

512K X 8 Bits

UC62LS4008

-20/-25

ꢀAC TEST CONDITIONS

ꢀKEY TO SWITCHING WAVEFORMS

Input Pulse Levels

VCC/0V

1V/ns

WAVEFORMS

INPUTS

OUTPUTS

Input Rise and Fall Times

Input and Output Timing Reference Level

0.5VCC

MUST BE

STEADY

MUST BE

STEADY

ꢀAC TEST LOADS AND WAVEFORMS

WILL BE

CHANGE

FROM H TO L

MAY CHANGE

FROM H TO L

3.3V

INCLUDING

JIG AND

SCOPE

INCLUDING

JIG AND

SCOPE

WILL BE

CHANGE

FROM L TO H

MAY CHANGE

FROM L TO H

OUTPUT

DON’T CARE

ANY CHANGE

PERMITTED

CHANGE

STATE

UNKNOWN

FIGURE 1A

FIGURE 1B

CENTER LINE

IS HIGH

IMPEDANCE

OFF STATE

DOES NOT

APPLY

TERMINAL EQUIVALENT

667Ω

OUTPUT

1.73V

ALL INPUT PULSES

V_CC

90% 90%

10%

GND

FIGURE 2

1V/ns

ꢀAC ELECTRICAL CHARACTERISTICS (TA=0℃to 70℃, V_CC=3.0V~3.6V)

READ CYCLE

JEDEC

PARAMETER

NAME

UC62LS4008-20 UC62LS4008-25

PARAMETER

NAME

DESCRIPTION

UNIT

Min

Typ

Max

Min

Typ

Max

t_AVAX

t_AVQV

t_ELQV

t_GLQV

t_ELQX

t_GLQX

t_EHQZ

t_GHQZ

t_AXOX

t_RC

t_AA

Read Cycle Time

Address Access Time

t_CE

Chip Select Access Time

t_OE

Output Enable to Output Valid

Chip Select to Output Low Z

Output Enable to Output Low Z

Chip Deselect to Output in High Z

Output Disable to Output in High Z

Address Chang to Output Change

t_CLZ

t_OLZ

t_CHZ

t_OHZ

t_OH

U-Chip Technology Corp. LTD. .

Preliminary Rev.1.0

Reserves the right to modify document contents without notice.

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