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CPLL66-3475-3475 PDF预览

CPLL66-3475-3475

更新时间: 2024-09-16 03:26:31
品牌 Logo 应用领域
CRYSTEKMICROWAVE /
页数 文件大小 规格书
6页 262K
描述
PLL/Synthesizer needing only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO

CPLL66-3475-3475 数据手册

 浏览型号CPLL66-3475-3475的Datasheet PDF文件第2页浏览型号CPLL66-3475-3475的Datasheet PDF文件第3页浏览型号CPLL66-3475-3475的Datasheet PDF文件第4页浏览型号CPLL66-3475-3475的Datasheet PDF文件第5页浏览型号CPLL66-3475-3475的Datasheet PDF文件第6页 
CPLL66-3475-3475  
0.60" SQ SMD  
Features  
1GHz-5GHz Range  
Standard 3 Wire Interface  
Small layout 0.6" x 0.6"  
Applications  
Digital Radio Equipment  
Fixed Wireless Access  
Satellite Communications Systems  
Base Stations  
Personal Communications Systems  
Portable Radios  
Test Instruments  
Wireless Infrastructure  
The CPLL66 is a complete PLL/Synthesizer needing only an external frequency reference and supply  
voltages for the internal PLL (phase lock loop) and VCO (voltage controlled oscillator). The Crystek  
CPLL66 is programmed using a standard three line interface (Data, Clock and Load Enable).  
The newly introduced CPLL66 family has been initially released to cover 1GHz to 5GHz in bands. It is  
housed in a compact 0.6-in. x 0.6-in. x 0.15-in. SMD package which saves board space. Typical phase  
noise at 4GHz is -90dBc/Hz at 10KHz offset with 0dBm minimum output power.  
Rev. B  
Page 1 of 6  

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