PRODUCT BRIEF
CHL8225/CHL8228
DIGITAL MULTI-PHASE BUCK CONTROLLER
parameters are easily defined using the CHiL Intuitive
Power Designer (IPD) GUI and stored in on-chip NVM.
FEATURES
5-phase & 8-phase dual output PWM Controller with
phases flexibly assigned between Loops 1 & 2
The CHL8225/8 provides extensive OVP, UVP, OCP and
OTP fault protection and includes thermistor based
temperature sensing with VRHOT signal.
Dynamic voltage control by 2-bit parallel interface with
Gamer Mode override and Vmax setting
Input Voltage Management for up to 3 Input Voltages
ICRITICAL Monitor and Phase Current Capture Mode
Phase Switching frequency from 200kHz to 1.2MHz
The CHL8225/8 includes numerous features like register
diagnostics for fast design cycles and platform
differentiation, simplifying VRD design and enabling fastest
time-to-market with its “set-and-forget” methodology.
CHiL Efficiency Shaping Features including Variable
Gate Drive, Dynamic Phase Control
Programmable 1-phase or 2-phase for Light Loads and
Active Diode Emulation for Very Light Loads
40
39
38
37
36
35
34
33
32
31
1
2
30
29
28
27
26
25
24
23
22
21
RCSP_L2
RCSM_L2
VCC
RCSP
RCSM
CHiL Adaptive Transient Algorithm (ATA) minimizes
output bulk capacitors and system cost
3
VCC
Designed for use with coupled inductors
4
VSEN_L2
VRTN_L2
PWM5
VSEN
5
VRTN
CHL8225
40 Pin 6x6 QFN
Top View
Per-Loop Fault Protection: OVP, UVP, OCP, OTP
6
RRES
I2C/SMBus/PMBus system interface for telemetry of
Temperature, Voltage, Current & Power for both loops
7
PWM4
TSEN
8
PWM3
V18A
Non-Volatile Memory (NVM) for custom configuration
Compatible with CHiL ATL and 3.3V tri-state Drivers
+3.3V supply voltage; 0ºC to 85ºC ambient operation
Pb-Free, RoHS, 6x6 40pin & 8x8 56pin QFN packages
PWM2
9
VR_READY
VR_READY_L2
41 GND
PWM1
10
11
12
13
14
15
16
17
18
19
20
DESCRIPTION
The CHL8225/8 are dual-loop digital multi-phase buck
controllers. The CHL8225 drives up to 5 phases and the
CHL8228 drives up to 8 phases. They feature Input Voltage
Management allowing up to 3 input voltages to be
monitored to ensure adequate power is delivered to the
load. Dynamic voltage control is provided by 4 registers
which are programmed through I2C/SMBus/PMBus and
then selected using a 2-bit parallel bus for fast access.
56
55
54
53
52
51
50
49
48
47
46
45
44
43
1
42
41
40
39
38
37
ISEN7
ISEN8
2
RCSP_L2
RCSM_L2
VCC
RCSP
3
RCSM
4
VCC
5
6
VRHOT2
VSEN
VSEN_L2
VRTN_L2
The CHL8225/8 NVM saves pins and enables a small
package size.
7
36 PWM8
VRTN
CHL8228
56 Pin 8x8 QFN
Top View
8
35
RRES
PWM7
The CHL8225/8 includes the CHiL Efficiency Shaping
Technology to deliver exceptional efficiency at minimum
cost across the entire load range. CHiL Variable Gate Drive
optimizes the MOSFET gate drive voltage as a function of
real-time load current. CHiL Dynamic Phase Control adds
and drops phases based upon load current. The
CHL8225/8 can be configured to enter 1-phase operation
and active diode emulation mode based upon load current
or by command.
9
34
TSEN
PWM6
10
11
12
13
14
33
32
31
30
29
V18A
PWM5
PWM4
PWM3
PWM2
PWM1
VR_READY
VR_READY_L2
EN_L2
57 GND
VINSEN
15
16
17
18
19
20
21
22
23
24
25
26
27
28
CHiL’s unique Adaptive Transient Algorithm (ATA), based
on proprietary non-linear digital PWM algorithms, minimizes
output bulk capacitors. In addition, a coupled inductor
mode, with phases added/dropped in pairs enables further
improvement in transient response and form factor.
Figure 1: CHL8225 & CHL8228 Packages
APPLICATIONS
The I2C/PMBus interface can communicate with up to 16
CHL8225/8 based VR loops. Device configuration and fault
Multiphase GPU systems
Trademarks and registered trademarks are the property of the respective
owners.
PB0008, Rev 1.0, June 11, 2010
One Highwood Drive, Tewksbury, MA 01876
Tel: +1(978) 640-0011
www.chilsemi.com
© 2010 CHiL Semiconductor Corp. All rights reserved
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