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CHL8225G

更新时间： 2024-09-24 12:47:27
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英飞凌 - INFINEON 多相元件控制器
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3页 346K
描述
Digital Multi-Phase Buck Controller

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CHL8225G 数据手册

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Digital Multi-Phase Buck Controller  
CHL8225G/8G  
FEATURES  
DESCRIPTION  
5-phase & 8-phase dual output PWM Controller  
The CHL8225G/8G are dual-loop, digital multi-phase buck  
controllers. The CHL8225G drives up to 5 phases and the  
CHL8228G drives up to 8 phases. They feature Input  
Voltage Management allowing up to 3 input voltages to be  
monitored to ensure adequate power is delivered to the  
load. Dynamic voltage control is provided by 4 registers  
which are programmed through I2C/SMBus/PMBus and  
then selected using a 2-bit parallel bus for fast access.  
with phases flexibly assigned between Loops 1 & 2  
Dynamic voltage control by 2-bit parallel interface  
with Gamer Mode override and Vmax setting  
Input Voltage Management for up to 3 Input  
Voltages  
ICRITICAL Monitor and Phase Current Capture Mode  
Phase Switching frequency from 200kHz to 1.2MHz  
The CHL8225G/8G includes the IR Efficiency Shaping  
Technology to deliver exceptional efficiency at minimum  
cost across the entire load range. IR Variable Gate Drive  
optimizes the MOSFET gate drive voltage as a function of  
real-time load current. IR Dynamic Phase Control adds and  
drops phases based upon load current. The CHL8225G/8G  
can be configured to enter 1-phase operation and active  
diode emulation based upon load current or by command.  
IR Efficiency Shaping Features including Variable  
Gate Drive, Dynamic Phase Control  
Programmable 1-phase or 2-phase for Light Loads  
and Active Diode Emulation for Very Light Loads  
IR Adaptive Transient Algorithm (ATA) minimizes  
output bulk capacitors and system cost  
Per-Loop Fault Protection: OVP, UVP, OCP, OTP  
IR’s unique Adaptive Transient Algorithm (ATA), based on  
proprietary non-linear digital PWM algorithms, minimizes  
output bulk capacitors.  
I2C/SMBus/PMBus system interface for telemetry of  
Temperature, Voltage, Current & Power for both  
loops  
The I2C/PMBus interface can communicate with up to 16  
CHL8225G/8G-based VR loops. Device configuration and  
fault parameters are defined using the IR Digital Power  
Design Center (DPDC) GUI and stored in on-chip NVM.  
Non-Volatile Memory (NVM) for custom  
configuration  
Compatible with IR ATL and 3.3V tri-state Drivers  
+3.3V supply voltage; 0ºC to 85ºC ambient  
operation  
The CHL8225G/8G provides extensive OVP, UVP, OCP and  
OTP fault protection and includes thermistor based  
temperature sensing with VRHOT signal. The CHL8225G/8G  
includes numerous features like register diagnostics for  
fast design cycles and platform differentiation, simplifying  
VRD design and enabling fastest time-to-market with its  
“set-and-forget” methodology.  
Pb-Free, RoHS, 6x6 40-pin & 8x8 56-pin QFN, MSL2  
package  
APPLICATIONS  
Multiphase GPU systems  
PIN DIAGRAM  
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
1
2
42  
41  
40  
39  
38  
37  
ISEN7  
ISEN8  
RCSP  
RCSP_L2  
RCSM_L2  
VCC  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
3
RCSM  
1
2
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
RCSP_L2  
RCSM_L2  
VCC  
RCSP  
RCSM  
4
VCC  
5
VRHOT2  
VSEN  
VSEN_L2  
VRTN_L2  
3
VCC  
6
4
VSEN_L2  
VRTN_L2  
PWM5  
VSEN  
CHL8228G  
7
36 PWM8  
VRTN  
56 Pin 8x8 QFN  
Top View  
CHL8225G  
5
8
35  
VRTN  
RRES  
PWM7  
40 Pin 6x6 QFN  
Top View  
9
34  
33  
32  
31  
30  
29  
TSEN  
PWM6  
PWM5  
PWM4  
PWM3  
PWM2  
PWM1  
6
RRES  
10  
11  
V18A  
7
PWM4  
TSEN  
VR_READY_L1  
8
PWM3  
V18A  
VR_READY_L2 12  
PWM2  
9
VR_READY_L1  
VR_READY_L2  
41 GND  
13  
14  
EN_L2  
PWM1  
57 GND  
10  
VINSEN  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Figure 1: CHL8225G Package Top View  
Figure 2: CHL8228G Package Top View  
1
June 21, 2013 | FINAL | V1.12  
123

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