Datasheet > CDP1823CD

CDP1823CD

更新时间： 2024-11-05 22:48:47

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
7页	32K
描述
128-Word x 8-Bit LSI Static RAM

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数据手册

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CDP1823CD 数据手册

CDP1823,

CDP1823C

128-Word x 8-Bit

LSI Static RAM

March 1997

Features

Description

• Fast Access Time

The CDP1823 and CDP1823C are 128-word by 8-bit CMOS

SOS static random-access memories. These memories are

compatible with general-purpose microprocessors. The two

memories are functionally identical. They differ in that the

CDP1823 has a recommended operating voltage range of

4V to 10.5V, and the CDP1823C has a recommended oper-

ating voltage range of 4V to 6.5V.

- V

= 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450ns

= 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns

• Common Data Inputs and Outputs

• Multiple Chip Select Inputs to Simplify Memory

System Expansion

The CDP1823 memory has 8 common data input and data

output terminals for direct connection to a bidirectional data

bus and is operated from a single voltage supply. Five chip-

select inputs are provided to simplify memory-system expan-

sion. In order to enable the CDP1823, the chip-select inputs

CS2, CS3 and CS5 require a low input signal, and the chip-

select inputs CS1 and CS4 require a high input signal.

Ordering Information

PKG.

PACKAGE TEMP. RANGE NO.

10V

CDP1823CE

CDP1823CD

CDP1823CDX

CDP1823E PDIP

CDP1823D SBDIP

-40 C to +85 C E24.6

-40 C to +85 C D24.6

The MRD signal enables all 8 output drivers when in the low

state and should be in a high state during a write cycle.

Burn-In

D24.6

After valid data appear at the output, the address inputs may

be changed immediately. Output data will be valid until either

the MRD signal goes high, the device is deselected, or t

(access time) after address changes.

Pinout

CDP1823, CDP1823C

(PDIP, SBDIP)

TOP VIEW

BUS 0

BUS 1

BUS 2

BUS 3

BUS 4

BUS 5

BUS 6

BUS 7

CS1

23 MA0

22 MA1

21 MA2

20 MA3

19 MA4

18 MA5

17 MA6

16 MWR

15 MRD

14 CS5

13 CS4

CS2 10

CS3 11

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 1198.2

6-24

12 3 4 5 6 7

中文翻译

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CDP1823CD3	INTERSIL	获取价格	High-Reliability CMOS 128-Word x 8-Bit Static RAM
CDP1823CDX	INTERSIL	获取价格	128-Word x 8-Bit LSI Static RAM
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CDP1823CEX	RENESAS	获取价格	IC,SRAM,128X8,CMOS,DIP,24PIN,PLASTIC
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