Datasheet > CDP1824

CDP1824

更新时间： 2024-11-05 22:48:47

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
6页	29K
描述
32-Word x 8-Bit Static RAM

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中文翻译

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数据手册

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CDP1824 数据手册

CDP1824,

CDP1824C

March 1997

32-Word x 8-Bit Static RAM

Features

Description

• Fast Access Time

The CDP1824 and CDP1824C are 32-word x 8-bit fully static

CMOS random-access memories for use in CDP-1800

series microprocessor systems. These parts are compatible

with the CDP1802 microprocessor and will interface directly

without additional components.

- V

= 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710ns

= 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320ns

• No Precharge or Clock Required

The CDP1824 is fully decoded and does not require a pre-

charge or clocking signal for proper operation. It has

common input and output and is operated from a single

voltage supply. The MRD signal (output disable control)

enables the three-state output drivers, and overrides the

MWR signal. A CS input is provided for memory expansion.

The CDP1824C is functionally identical to the CDP1824.

The CDP1824 has an operating range of 4V to 10.5V, and

the CDP1824C has an operating voltage range of 4V to

6.5V. The CDP1824 and CDP1824C are supplied in 18 lead

hermetic dual-in-line ceramic packages (D sufﬁx), and in 18

lead dual-in-line plastic packages (E sufﬁx).

Ordering Information

10V

PACKAGE

TEMPERATURE RANGE

PKG. NO.

E18.3

CDP1824CE

CDP1824CEX

CDP1824CD

CDP1824E

PDIP

Burn-In

SBDIP

-40 C to +85 C

CDP1824EX

CDP1824D

E18.3

D18.3

-40 C to +85 C

Pinout

CDP1824, CDP1824C (PDIP, SBDIP)

TOP VIEW

OPERATIONAL MODES

FUNCTION

CS MRD MWR

DATA PINS STATUS

MA4

MA3

18 V

READ

Output: High/LowDependent

on Data

17 MWR

16 MRD

15 CS

MA2

WRITE

Input: Output Disabled

MA1

Not

Selected

Output Disabled:

High-Impedance State

MA0

14 BUS 0

13 BUS 1

12 BUS 2

11 BUS 3

BUS 7

BUS 6

BUS 5

Standby

Output Disabled:

High-Impedance State

Logic 1 = High Logic 0 = Low X = Don’t Care

BUS 4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 1103.2

6-37

12 3 4 5 6

中文翻译

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与CDP1824相关器件

型号	品牌	获取价格	描述	数据表
CDP1824/3	INTERSIL	获取价格	High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
CDP18243	INTERSIL	获取价格	High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
CDP1824C	INTERSIL	获取价格	32-Word x 8-Bit Static RAM
CDP1824C/3	INTERSIL	获取价格	High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
CDP1824CD	INTERSIL	获取价格	32-Word x 8-Bit Static RAM
CDP1824CD3	INTERSIL	获取价格	High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
CDP1824CDX	ROCHESTER	获取价格	32X8 STANDARD SRAM, 710ns, CDIP18
CDP1824CDX	RENESAS	获取价格	IC,SRAM,32X8,CMOS,DIP,18PIN,CERAMIC
CDP1824CE	INTERSIL	获取价格	32-Word x 8-Bit Static RAM
CDP1824CE	RENESAS	获取价格	32X8 STANDARD SRAM, 710ns, PDIP18