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CDP1824CD3 PDF预览

CDP1824CD3

更新时间： 2024-11-05 22:15:51
品牌 Logo 应用领域
英特矽尔 - INTERSIL 存储内存集成电路静态存储器
页数 文件大小 规格书
5页 105K
描述
High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory

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CDP1824CD3 数据手册

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TM  
CDP1824/3,  
CDP1824C/3  
High-Reliability CMOS 32-Word x 8-Bit  
Static Random-Access Memory  
March 1997  
Features  
Description  
• Access Time  
- 610ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . at V  
The CDP1824/3 and CDP1824C/3 types are high-reliability  
CMOS 32-word x 8-bit fully static random-access memories  
for use in CDP1800-series microprocessor systems. These  
parts are compatible with the CDP1802 microprocessor and  
will interface directly without additional components.  
= 5V  
DD  
= 10V  
- 320ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . at V  
DD  
• No Precharge or Clock Required  
The CDP1824/3 is fully decoded and does not require a pre-  
charge or clocking signal for proper operation. It has com-  
mon input and output and is operated from a single voltage  
supply. The MRD signal (output disable control) enables the  
three-state output drivers, and overrides the MWR signal. A  
CS input is provided for memory expansion.  
Ordering Information  
PACK-  
PKG.  
NO.  
5V  
10V  
AGE  
TEMP. RANGE  
o
CDP1824CD3 CDP1824D3 SBDIP  
-55 C to  
D18.3  
o
+125 C  
The CDP1824C/3 is functionally identical to the CDP1824/3.  
The CDP1824/3 has a recommended operating voltage  
range of 4V to 10.5V, and the CDP1824C/3 has an operating  
voltage range of 4V to 6.5V.  
Pinout  
Functional Diagram  
CDP1824/3, CDP1824C/3 (SBDIP)  
MA4  
MA3  
TOP VIEW  
2
1
3
MA2  
MA4  
MA3  
1
2
3
4
5
6
7
8
9
18 V  
DD  
32 X 8-BIT  
ARRAY  
ADDRESS  
DECODER  
4
MA1  
17 MWR  
16 MRD  
15 CS  
5
MA0  
MA2  
MA1  
SENSE  
AMPL  
MA0  
14 BUS0  
13 BUS1  
12 BUS2  
11 BUS3  
10 BUS4  
BUS7  
BUS6  
BUS5  
16  
17  
MRD  
MWR  
V
SS  
I/O BUFFERS  
15  
CS  
6
7
8
10 11 12 13 14  
V
= 18  
= 9  
DD  
V
SS  
BUS BUS BUS BUS BUS BUS BUS BUS  
7
6
5
4
3
2
1
0
OPERATIONAL MODES  
FUNCTION  
READ  
CS  
0
MRD  
MWR  
DATA PINS STATUS  
Output: High/Low Dependent on Data  
Input: Output Disabled  
0
1
X
1
X
0
X
1
WRITE  
0
Not Selected  
Standby  
1
Output Disabled: High-Impedance State  
Output Disabled: High-Impedance State  
0
Logic 1 = High Logic 0 = Low X = Don’t Care  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
File Number 1717.2  
Copyright © Intersil Americas Inc. 2001. All Rights Reserved  
42  
12345

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CDP1824D INTERSIL

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 		32-Word x 8-Bit Static RAM
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 		High-Reliability CMOS 32-Word x 8-Bit Static Random-Access Memory
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