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CDP1802AQ PDF预览

CDP1802AQ

更新时间: 2024-09-15 19:55:07
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟外围集成电路
页数 文件大小 规格书
27页 115K
描述
8-BIT, 3.2MHz, MICROPROCESSOR, PQCC44, PLASTIC, LCC-44

CDP1802AQ 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:PLASTIC, LCC-44
针数:44Reach Compliance Code:not_compliant
Factory Lead Time:1 week风险等级:5.8
Is Samacsys:N地址总线宽度:8
位大小:8边界扫描:NO
最大时钟频率:3.2 MHz外部数据总线宽度:8
格式:FIXED POINT集成缓存:NO
JESD-30 代码:S-PQCC-J44JESD-609代码:e0
长度:16.585 mm低功率模式:NO
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/10 V
认证状态:Not Qualified座面最大高度:4.57 mm
速度:3.2 MHz子类别:Microprocessors
最大压摆率:4 mA最大供电电压:6.5 V
最小供电电压:4 V标称供电电压:10 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:16.585 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR
Base Number Matches:1

CDP1802AQ 数据手册

 浏览型号CDP1802AQ的Datasheet PDF文件第2页浏览型号CDP1802AQ的Datasheet PDF文件第3页浏览型号CDP1802AQ的Datasheet PDF文件第4页浏览型号CDP1802AQ的Datasheet PDF文件第5页浏览型号CDP1802AQ的Datasheet PDF文件第6页浏览型号CDP1802AQ的Datasheet PDF文件第7页 
CDP1802A, CDP1802AC,  
CDP1802BC  
CMOS 8-Bit Microprocessors  
March 1997  
Features  
Description  
• Maximum Input Clock Maximum Frequency Options  
At VDD = 5V  
The CDP1802 family of CMOS microprocessors are 8-bit  
register oriented central processing units (CPUs) designed  
for use as general purpose computing or control elements in  
a wide range of stored program systems or products.  
- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . .3.2MHz  
- CDP1802BC. . . . . . . . . . . . . . . . . . . . . . . . . . . .5.0MHz  
[ /Title  
(CDP1  
802A,  
CDP18  
02AC,  
CDP18  
02BC)  
/Sub-  
ject  
(CMO  
S 8-  
Bit  
Micro-  
proces-  
sors)  
/Autho  
r ()  
/Key-  
words  
(Inter-  
sil  
Corpo-  
ration,  
8-bit  
micro-  
proces-  
sors, 8  
bit  
micro-  
proces-  
sors,  
• Maximum Input Clock Maximum Frequency Options  
At VDD = 10V  
The CDP1802 types include all of the circuits required for  
fetching, interpreting, and executing instructions which have  
been stored in standard types of memories. Extensive  
input/output (I/O) control features are also provided to facili-  
tate system design.  
- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . .6.4MHz  
• Minimum Instruction Fetch-Execute Times  
At VDD = 5V  
- CDP1802A, AC . . . . . . . . . . . . . . . . . . . . . . . . . . 5.0µs The 1800 series architecture is designed with emphasis on  
the total microcomputer system as an integral entity so that  
systems having maximum flexibility and minimum cost can  
be realized. The 1800 series CPU also provides a synchro-  
nous interface to memories and external controllers for I/O  
devices, and minimizes the cost of interface controllers. Fur-  
ther, the I/O interface is capable of supporting devices oper-  
ating in polled, interrupt driven, or direct memory access  
modes.  
- CDP1802BC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2µs  
• Any Combination of Standard RAM and ROM Up to  
65,536 Bytes  
• 8-Bit Parallel Organization With Bidirectional Data Bus  
and Multiplexed Address Bus  
• 16 x 16 Matrix of Registers for Use as Multiple  
Program Counters, Data Pointers, or Data Registers  
The CDP1802A and CDP1802AC have a maximum input  
clock frequency of 3.2MHz at VDD = 5V. The CDP1802A and  
CDP1802AC are functionally identical. They differ in that the  
CDP1802A has a recommended operating voltage range of  
4V to 10.5V, and the CDP1802AC a recommended operat-  
ing voltage range of 4V to 6.5V.  
• On-Chip DMA, Interrupt, and Flag Inputs  
• Programmable Single-Bit Output Port  
• 91 Easy-to-Use Instructions  
The CDP1802BC is  
a higher speed version of the  
CDP1802AC, having a maximum input clock frequency of  
5.0MHz at VDD = 5V, and a recommended operating voltage  
range of 4V to 6.5V.  
Ordering Information  
PART NUMBER  
5V - 3.2MHz  
CDP1802ACE  
CDP1802ACEX  
CDP1802ACQ  
CDP1802ACD  
CDP1802ACDX  
5V - 5MHz  
CDP1802BCE  
CDP1802BCEX  
CDP1802BCQ  
-
TEMPERATURE RANGE  
PACKAGE  
PDIP  
Burn-In  
PLCC  
SBDIP  
Burn-In  
PKG. NO.  
E40.6  
o
o
-40 C to +85 C  
E40.6  
N44.65  
D40.6  
D40.6  
o
o
-40 C to +85 C  
o
o
-40 C to +85 C  
periph-  
erals)  
/Cre-  
CDP1802BCDX  
ator ()  
/DOCI  
NFO  
pdf-  
mark  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 1305.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19993-3  

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