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CDCE18005RGZT PDF预览

CDCE18005RGZT

更新时间： 2024-10-02 06:47:07
品牌 Logo 应用领域
德州仪器 - TI 时钟驱动器时钟发生器逻辑集成电路PC
页数 文件大小 规格书
58页 1886K
描述
Five/Ten Output Clock Generator/Buffer

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中文翻译

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CDCE18005RGZT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：QFN-48针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.25Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：605437
Samacsys Pin Count：49Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：QFN50P700X700X100-49N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
系列：CDC输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-PQCC-N48JESD-609代码：e4
长度：7 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：3功能数量：1
反相输出次数：端子数量：48
实输出次数：10最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
包装方法：TR峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mm最小 fmax：1500 MHz
Base Number Matches：1

CDCE18005RGZT 数据手册

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CDCE18005  
www.ti.com........................................................................................................................................................................................... SCAS863–NOVEMBER 2008  
Five/Ten Output Clock Generator/Buffer  
1
FEATURES  
APPLICATIONS  
•
•
•
•
•
•
•
Data Converter and Data Aggregation Clocking  
Wireless Infrastructure  
Switches and Routers  
Medical Electronics  
Military and Aerospace  
Industrial  
•
•
•
Universal Input Buffers That Accept LVPECL,  
LVDS, or LVCMOS Level Signaling  
Fully Configurable Outputs Including  
Frequency, Output Format, and Output Skew  
Output Multiplexer That Serves as a Clock  
Switch Between the Three Reference Inputs  
and the Outputs  
Clock Fan-out  
•
•
Clock Generation Via AT-Cut Crystal  
DESCRIPTION  
Integrated EEPROM Determines Device  
Configuration at Power-up  
The CDCE18005 is  
a high performance clock  
generator and distributor featuring a high degree of  
configurability via a SPI interface, and programmable  
start up modes determined by on-board EEPROM.  
Specifically tailored for buffering clocks for data  
converters and high-speed digital signals, the  
CDCE18005 achieves low additive jitter in the 50 fs  
RMS(1) range. The clock distribution block includes  
five individually programmable outputs that can be  
configured to provide different combinations of output  
formats (LVPECL, LVDS, LVCMOS). Each output can  
also be programmed to a unique output frequency  
(up to 1.5 GHz(2) ) and skew relationship via a  
programmable delay block. If all outputs are  
configured in single-ended mode (e.g. LVCMOS), the  
CDCE18005 supports up to ten outputs. Each output  
can select one of three clock input sources. The input  
block includes two universal differential inputs which  
support frequencies up to 1500 MHz and an auxiliary  
single ended input that can be connected to a CMOS  
level clock or configured to connect to an external  
crystal via an on board oscillator block.  
•
•
Low Additive Jitter Performance  
Universal Output Blocks Support up to 5  
Differential, 10 Single-ended, or Combinations  
of Differential or Single-ended:  
– Low Additive Jitter  
– Output Frequency up to 1.5 GHz  
– LVPECL, LVDS, LVCMOS, and Special High  
Output Swing Modes  
– Independent Output Dividers Support  
Divide Ratios from 1–80  
– Independent limited Coarse Skew Control  
on all Outputs  
•
Flexible Inputs:  
– Two Universal Differential Inputs Accept  
Frequencies up to 1500 MHz (LVPECL), 800  
MHz (LVDS), or 250 MHz (LVCMOS).  
– One Auxiliary Input Accepts Single Ended  
Clock Source or Crystal. Auxiliary Input  
Accepts Crystals in the Range of 2 MHz–42  
MHz or an LVCMOS Input up to 75 MHz.  
LVCMOS 25MHz  
LVPECL 1.5GHz / LVDS 800MHz  
LVCMOS 25MHz  
LVPECL 800MHz  
LVDS 750MHz  
– Clock Generator Mode Using Crystal Input.  
•
•
Typical Power Consumption 1.0W at 3.3V (see  
Table 27)  
CDCE18005  
LVDS 800MHz  
Crystal 25MHz  
Integrated EEPROM Stores Default Settings;  
Therefore, The Device Powers up in a Known,  
Predefined State.  
LVPECL 1.5GHz  
•
•
•
Offered in QFN-48 Package  
Figure 1. CDCE18005 Application Example  
ESD Protection Exceeds 2kV HBM  
Industrial Temperature Range –40°C to 85°C  
(1) 12 kHz to 20 MHz integration bandwidth.  
(2) Maximum output frequency depends on the output format  
selected  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008, Texas Instruments Incorporated  
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CDCE18005RGZT 替代型号

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CDCE18005RGZR TI

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 Five/Ten Output Clock Generator/Buffer

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