CD74FCT821A,
CD74FCT822A
Data sheet acquired from Harris Semiconductor
SCHS264
BiCMOS FCT Interface Logic,
January 1997
10- Bit D-Type Flip-Flops, Three-State
Features
Description
• Buffered Inputs
The CD74FCT821A and CD74FCT822A ten bit, D-Type,
three-state, positive edge triggered flip-flops use a small
geometry BiCMOS technology. The output stage is a combi-
nation of bipolar and CMOS transistors that limits the output
• Typical Propagation Delay: 7.5ns at V
o
= 5V,
CC
T = 25 C, C = 50pF
A
L
HIGH level to two diode drops below V . This resultant
lowering of output swing (0V to 3.7V) reduces power bus
• CD74FCT821A
- Noninverting
CC
ringing (a source of EMI) and minimizes V
bounce and
CC
• CD74FCT822A
- Inverting
ground bounce and their effects during simultaneous output
switching. The output configuration also enhances switching
speed and is capable of sinking 48 milliamperes.
• SCR Latchup Resistant BiCMOS Process and
Circuit Design
The ten flip-flops enter data into their registers on the LOW
to HIGH transition of the clock(CP). The Output Enable (OE)
controls the three state outputs and is independent of the
register operation. When the Output Enable (OE) is HIGH,
the outputs are in the high impedance state. The
CD74FCT821A and CD74FCT822A share the same config-
urations, but the CD74FCT821A outputs are noninverted
while the CD74FCT822A devices have inverted outputs.
• Speed of Bipolar FAST™/AS/S
• 48mA Output Sink Current
• Output Voltage Swing Limited to 3.7V at V
• Controlled Output Edge Rates
= 5V
CC
• Input/Output Isolation to V
CC
• BiCMOS Technology with Low Quiescent Power
Ordering Information
TEMP.
PKG.
NO.
o
PART NUMBER RANGE ( C)
PACKAGE
24 Ld PDIP
24 Ld PDIP
24 Ld SOIC
CD74FCT821AEN
CD74FCT822AEN
CD74FCT821AM
0 to 70
0 to 70
0 to 70
E24.3
E24.3
M24.3
NOTE: When ordering the suffix M packages, use the entire part
number. Add the suffix 96 to obtain the variant in the tape and reel.
Pinouts
CD74FCT821A
(PDIP, SOIC)
TOP VIEW
CD74FCT822A
(PDIP, SOIC)
TOP VIEW
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
24
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
24
V
V
CC
CC
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 Q9
13 CP
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 Q9
13 CP
D8 10
D9 11
D8 10
D9 11
GND 12
GND 12
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1997
File Number 2390.2
8-1