5秒后页面跳转
CD4070BMS PDF预览

CD4070BMS

更新时间: 2024-11-24 14:57:47
品牌 Logo 应用领域
瑞萨 - RENESAS
页数 文件大小 规格书
8页 332K
描述
CMOS Quad Exclusive OR and Exclusive NOR Gate

CD4070BMS 技术参数

生命周期:Transferred零件包装代码:DFP
包装说明:DFP,针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.65Is Samacsys:N
系列:CMOSJESD-30 代码:R-PDFP-F16
逻辑集成电路类型:XOR GATE功能数量:4
输入次数:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):378 ns认证状态:Not Qualified
筛选级别:MIL-STD-883标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子位置:DUALBase Number Matches:1

CD4070BMS 数据手册

 浏览型号CD4070BMS的Datasheet PDF文件第2页浏览型号CD4070BMS的Datasheet PDF文件第3页浏览型号CD4070BMS的Datasheet PDF文件第4页浏览型号CD4070BMS的Datasheet PDF文件第5页浏览型号CD4070BMS的Datasheet PDF文件第6页浏览型号CD4070BMS的Datasheet PDF文件第7页 
DATASHEET  
CD4070BMS, CD4077BMS  
CMOS Quad Exclusive OR and Exclusive NOR Gates  
FN3322  
Rev 0.00  
December 1992  
CD4070BMS  
TOP VIEW  
Features  
Pinouts  
• High Voltage Types (20V Rating)  
• CD4070BMS - Quad Exclusive OR Gate  
• CD4077BMS - Quad Exclusive NOR Gate  
A
1
2
3
4
5
6
7
14 VDD  
13 H  
B
J = AB  
K = CD  
C
12 G  
• Medium Speed Operation  
11 M = GH  
10 L = EF  
- tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF  
• 5V, 10V and 15V Parametric Ratings  
D
9
8
F
E
VSS  
• Standardized, Symmetrical Output Characteristics  
• 100% Tested for Quiescent Current at 20V  
CD4077BMS  
TOP VIEW  
• Maximum Input Current of 1A at 18V Over Full Pack-  
age Temperature Range; 100nA at 18V and +25oC  
A
B
1
2
3
14 VDD  
13 H  
• Noise Margin (Over Full Package/Temperature Range)  
- 1V at VDD = 5V  
J = AB  
12 G  
- 2V at VDD = 10V  
K = CÝD4  
11 M = GH  
10 L = EF  
- 2.5V at VDD = 15V  
C
D
5
6
7
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
9
8
F
E
VSS  
Applications  
Functional Diagram  
• Logical Comparators  
• Parity Generators and Checkers  
• Adders/Subtractors  
1
A
3
4
J
2
B
J = AB  
5
6
K = CD  
C
D
K
L
M = GH  
L = EF  
Description  
8
9
E
F
10  
11  
CD4070BMS contains four independent Exclusive OR  
gates. The CD4077BMS contains four independent Exclu-  
sive NOR gates.  
VSS = 7  
VDD = 14  
12  
13  
G
H
M
The CD4070BMS and CD4077BMS provide the system  
designer with a means for direct implementation of the  
Exclusive OR and Exclusive NOR functions, respectively.  
CD4070BMS  
The CD4070BMS and CD4077BMS are supplied in these 14  
lead outline packages:  
1
2
A
B
3
4
J
Braze Seal DIP  
Frit Seal DIP  
H4Q  
H1B  
*H4F  
J = AB  
K = CD  
5
6
C
D
K
L
8
9
Ceramic Flatpack  
*CD4070B Only  
†H3W  
E
F
M = GH  
L = EF  
10  
11  
†CD4077B Only  
12  
13  
G
H
M
CD4077BMS  
FN3322 Rev 0.00  
December 1992  
Page 1 of 8  

与CD4070BMS相关器件

型号 品牌 获取价格 描述 数据表
CD4070BMT TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BMTE4 TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BMTG4 TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BMW NSC

获取价格

IC 4000/14000/40000 SERIES, QUAD 2-INPUT XOR GATE, CDFP14, CERAMIC, FP-14, Gate
CD4070BMW/883 ETC

获取价格

Quad 2-input Exclusive OR (XOR) Gate
CD4070BMW-MIL NSC

获取价格

暂无描述
CD4070BMW-MIL TI

获取价格

IC,LOGIC GATE,QUAD 2-INPUT XOR,CMOS,FP,14PIN,CERAMIC
CD4070BNSR TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BNSRE4 TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BNSRG4 TI

获取价格

CMOS Quad Exclusive-OR and Exclusive-NOR Gate