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CD4070BPW PDF预览

CD4070BPW

更新时间: 2024-11-04 12:28:39
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路石英晶振光电二极管
页数 文件大小 规格书
30页 1240K
描述
CMOS Quad Exclusive-OR and Exclusive-NOR Gate

CD4070BPW 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.33
系列:4000/14000/40000JESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.0068 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:5/15 V最大电源电流(ICC):0.03 mA
Prop。Delay @ Nom-Sup:280 ns传播延迟(tpd):280 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

CD4070BPW 数据手册

 浏览型号CD4070BPW的Datasheet PDF文件第2页浏览型号CD4070BPW的Datasheet PDF文件第3页浏览型号CD4070BPW的Datasheet PDF文件第4页浏览型号CD4070BPW的Datasheet PDF文件第5页浏览型号CD4070BPW的Datasheet PDF文件第6页浏览型号CD4070BPW的Datasheet PDF文件第7页 
CD4070B,  
CD4077B  
Data sheet acquired from Harris Semiconductor  
SCHS055E  
CMOS Quad Exclusive-OR  
and Exclusive-NOR Gate  
January 1998 - Revised September 2003  
Features  
Ordering Information  
• High-Voltage Types (20V Rating)  
• CD4070B - Quad Exclusive-OR Gate  
• CD4077B - Quad Exclusive-NOR Gate  
• Medium Speed Operation  
TEMP. RANGE  
o
PART NUMBER  
CD4070BE  
( C)  
PACKAGE  
14 Ld PDIP  
[ /Title  
(CD40  
70B,  
CD407  
7B)  
/Sub-  
ject  
(CMO  
SQuad  
Exclu-  
sive-  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
CD4070BF3A  
CD4070BM  
14 Ld CERDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOP  
- t  
, t  
PHL PLH  
= 65ns (Typ) at V = 10V, C = 50pF  
DD L  
• 100% Tested for Quiescent Current at 20V  
• Standardized Symmetrical Output Characteristics  
• 5V, 10V and 15V Parametric Ratings  
CD4070BMT  
CD4070BM96  
CD4070BNSR  
CD4070BPW  
CD4070BPWR  
CD4077BE  
• Maximum Input Current of 1µA at 18V Over Full  
Package Temperature Range  
o
- 100nA at 18V and 25 C  
14 Ld TSSOP  
14 Ld TSSOP  
14 Ld PDIP  
14 Ld CERDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOP  
• Noise Margin (Over Full Package Temperature Range)  
OR  
and  
- 1V at V  
DD  
= 5V, 2V at V  
DD  
= 10V, 2.5V at V  
= 15V  
DD  
• Meets All Requirements of JEDEC Standard No. 13B,  
“Standard Specifications for Description of ‘B’ Series  
CMOS Devices  
Exclu-  
sive-  
NOR  
Gate)  
/Autho  
r ()  
/Key-  
words  
(Har-  
ris  
Semi-  
con-  
CD4077BF3A  
CD4077BM  
Applications  
CD4077BMT  
CD4077BM96  
CD4077BNSR  
CD4077BPW  
CD4077BPWR  
• Logical Comparators  
• Adders/Subtractors  
• Parity Generators and Checkers  
14 Ld TSSOP  
14 Ld TSSOP  
Description  
The Harris CD4070B contains four independent Exclusive-  
OR gates. The Harris CD4077B contains four independent  
Exclusive-NOR gates.  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
ductor,  
CD400  
0,  
The CD4070B and CD4077B provide the system designer  
with a means for direct implementation of the Exclusive-OR  
and Exclusive-NOR functions, respectively.  
metal  
gate,  
CMOS  
, pdip,  
cerdip,  
mil,  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD4070BPW 替代型号

型号 品牌 替代类型 描述 数据表
CD4070BPWRG4 TI

完全替代

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BPWG4 TI

完全替代

CMOS Quad Exclusive-OR and Exclusive-NOR Gate
CD4070BPWE4 TI

完全替代

CMOS Quad Exclusive-OR and Exclusive-NOR Gate

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