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CD4030CSJ PDF预览

CD4030CSJ

更新时间: 2024-11-03 22:54:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
5页 48K
描述
Quad EXCLUSIVE-OR Gate

CD4030CSJ 数据手册

 浏览型号CD4030CSJ的Datasheet PDF文件第2页浏览型号CD4030CSJ的Datasheet PDF文件第3页浏览型号CD4030CSJ的Datasheet PDF文件第4页浏览型号CD4030CSJ的Datasheet PDF文件第5页 
October 1987  
Revised January 1999  
CD4030C  
Quad EXCLUSIVE-OR Gate  
t
PHL = tPLH = 40 ns (typ.) at CL = 15 pF, 10V supply  
General Description  
High noise immunity  
0.45 VCC (typ.)  
The CD4030C EXCLUSIVE-OR gates are monolithic com-  
plementary MOS (CMOS) integrated circuits constructed  
with N- and P-channel enhancement mode transistors. All  
inputs are protected against static discharge with diodes to  
Applications  
Automotive  
VDD and VSS  
.
Data terminals  
Instrumentation  
Medical electronics  
Industrial controls  
Remote metering  
Computers  
Features  
Wide supply voltage range: 3.0V to 15V  
Low power: 100 nW (typ.)  
Medium speed operation:  
Ordering Code:  
Order Number  
CD4030CSJ  
CD4030CN  
Package Number  
M14D  
Package Description  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Pin Assignments for DIP and SOP  
A
0
1
0
1
B
0
0
1
1
J
0
1
1
0
1 = HIGH Level  
0 = LOW Level  
© 1999 Fairchild Semiconductor Corporation  
DS005961.prf  
www.fairchildsemi.com  

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