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BU52092GWZ PDF预览

BU52092GWZ

更新时间: 2023-09-03 20:25:21
品牌 Logo 应用领域
罗姆 - ROHM 手机智能手机电脑
页数 文件大小 规格书
17页 901K
描述
两极检测霍尔IC用于检测S极或N极的磁场。通过组合本霍尔IC和磁铁,可以实现平板电脑和智能手机的盖开闭检测功能等。

BU52092GWZ 数据手册

 浏览型号BU52092GWZ的Datasheet PDF文件第8页浏览型号BU52092GWZ的Datasheet PDF文件第9页浏览型号BU52092GWZ的Datasheet PDF文件第10页浏览型号BU52092GWZ的Datasheet PDF文件第12页浏览型号BU52092GWZ的Datasheet PDF文件第13页浏览型号BU52092GWZ的Datasheet PDF文件第14页 
BU52092GWZ  
Operational Notes continued  
11. Unused Input Pins  
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and  
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small  
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and  
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the  
power supply or ground line.  
12. Regarding the Input Pin of the IC  
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation  
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.  
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin  
lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power  
supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have  
voltages within the values specified in the electrical characteristics of this IC.  
13. Ceramic Capacitor  
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with  
temperature and the decrease in nominal capacitance due to DC bias and others.  
14. Area of Safe Operation (ASO)  
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within  
the Area of Safe Operation (ASO).  
15. Disturbance light  
In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due  
to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip  
from being exposed to light.  
www.rohm.com  
TSZ02201-0M2M0F416020-1-2  
8.Aug.2016 Rev.001  
© 2016 ROHM Co., Ltd. All rights reserved.  
11/14  
TSZ22111 15 001  

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