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BS616UV1010AIIG10 PDF预览

BS616UV1010AIIG10

更新时间: 2024-11-14 03:35:11
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
9页 145K
描述
SRAM

BS616UV1010AIIG10 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.84
Base Number Matches:1

BS616UV1010AIIG10 数据手册

 浏览型号BS616UV1010AIIG10的Datasheet PDF文件第2页浏览型号BS616UV1010AIIG10的Datasheet PDF文件第3页浏览型号BS616UV1010AIIG10的Datasheet PDF文件第4页浏览型号BS616UV1010AIIG10的Datasheet PDF文件第5页浏览型号BS616UV1010AIIG10的Datasheet PDF文件第6页浏览型号BS616UV1010AIIG10的Datasheet PDF文件第7页 
Ultra Low Power/Voltage CMOS SRAM  
64K X 16 bit  
BSI  
BS616UV1010  
n FEATURES  
n DESCRIPTION  
ŸUltra low VCC operation voltage : 1.9V ~ 3.6V  
The BS616UV1010 is a high performance, ultra low power CMOS Static  
Random Access Memory organized as 65,536 words by 16 bits and  
operates form a wide range of 1.9V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with typical CMOS standby current of  
0.01uA and maximum access time of 100ns in 1.9V operation.  
Easy memory expansion is provided by an active LOW chip enable (CE)  
and active LOW output enable (OE) and three-state output drivers.  
The BS616UV1010 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
ŸVery low power consumption :  
VCC = 2.0V  
10mA(Max.) operating current  
0.01uA (Typ.) CMOS standby current  
18mA(Max.) operating current  
VCC = 3.0V  
0.02uA (Typ.) CMOS standby current  
ŸHigh speed access time :  
-10  
100ns(Max.)  
ŸAutomatic power down when chip is deselected  
ŸEasy expansion with CE and OE options  
ŸI/O Configuration x8/x16 selectable by LB and UB pin.  
ŸThree state outputs and TTL compatible  
ŸFully static operation  
The BS616UV1010 is available in JEDEC standard 44-pin TSOP II and  
48-ball BGA package.  
ŸData retention supply voltage as low as 1.5V  
n PRODUCT FAMILY  
POWER DISSIPATION  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
VCC  
RANGE  
SPEED  
(ns)  
STANDBY  
(ICCSB1, Max)  
Operating  
(ICC, Max)  
PKG TYPE  
VCC=3.0V  
VCC=2.0V  
VCC=3.0V  
VCC=2.0V  
BS616UV1010EC  
BS616UV1010AC  
BS616UV1010EI  
BS616UV1010AI  
TSOP2-44  
+0OC to +70OC  
-40OC to +85OC  
1.9V ~ 3.6V  
1.9V ~ 3.6V  
100  
100  
1.0uA  
1.5uA  
0.5uA  
20mA  
20mA  
15mA  
BGA-48-0608  
TSOP2-44  
1.0uA  
15mA  
BGA-48-0608  
n PIN CONFIGURATIONS  
n BLOCK DIAGRAM  
A4  
A3  
A2  
A1  
A0  
1
2
3
4
5
6
7
8
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A5  
A6  
A7  
OE  
UB  
LB  
CE  
A8  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
VSS  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
A15  
A14  
A13  
A12  
NC  
DQ15  
DQ14  
DQ13  
DQ12  
VSS  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
A8  
A9  
A10  
A11  
NC  
A13  
9
A15  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Address  
512  
Memory Array  
18  
A14  
A12  
A7  
BS616UV1010EC  
BS616UV1010EI  
Input  
Row  
Decoder  
Buffer  
512 x 2048  
A6  
A5  
A4  
2048  
DQ0  
Data  
Input  
Buffer  
16  
16  
16  
Column I/O  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
.
1
2
3
4
5
6
16  
.
Data  
Output  
Buffer  
.
.
128  
A
B
C
D
E
F
UB  
D8  
OE  
A0  
A1  
A2  
NC  
D0  
Column Decoder  
DQ15  
LB  
D10  
D11  
D12  
D13  
NC  
A3  
A5  
A4  
A6  
CE  
D1  
14  
CE  
WE  
OE  
UB  
LB  
D9  
D2  
Address Input Buffer  
Control  
VSS  
VCC  
D14  
D15  
NC  
NC  
NC  
A14  
A12  
A9  
A7  
D3  
VCC  
VSS  
D6  
NC  
A15  
A13  
A10  
D4  
A11 A9 A3 A2 A1 A0 A10  
VCC  
VSS  
D5  
G
H
WE  
A11  
D7  
A8  
NC  
48-ball BGA top view  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
R0201-BS616UV1010  
Revision 2.4  
May. 2005  
1

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