Very Low Power CMOS SRAM
512K X 16 bit
BS616LV8017
Pb-Free and Green package materials are compliant to RoHS
n FEATURES
ŸWide VCC operation voltage : 2.4V ~ 5.5V
n DESCRIPTION
The BS616LV8017 is a high performance, very low power CMOS
Static Random Access Memory organized as 524,288 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.8uA at 3.0V/25OC and maximum access time of 70ns at
2.7V/125OC.
ŸVery low power consumption :
VCC = 3.0V
VCC = 5.0V
Operation current : 25mA (Max.) at 70ns
2mA (Max.) at 1MHz
Standby current : 0.8uA (Typ.) at 25OC
Operation current : 61mA (Max.) at 70ns
10mA (Max.) at 1MHz
Standby current : 3.5uA (Typ.) at 25OC
ŸHigh speed access time :
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
-70
70ns(Max.) at VCC=2.7~5.5V
ŸAutomatic power down when chip is deselected
ŸEasy expansion with CE and OE options
ŸI/O Configuration x8/x16 selectable by LB and UB pin.
ŸThree state outputs and TTL compatible
ŸFully static operation
The BS616LV8017 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV8017 is available in DICE form, JEDEC standard
44-pin TSOP II and 48-ball BGA package.
ŸData retention supply voltage as low as 1.5V
n POWER CONSUMPTION
POWER DISSIPATION
STANDBY
Operating
PRODUCT
FAMILY
OPERATING
TEMPERATURE
PKG TYPE
(ICC, Max)
(ICCSB1, Typ.)
(ICCSB1, Max)
VCC=5.0V
1MHz fMax.
VCC=3.0V
VCC=5.0V VCC=3.0V VCC=5.0V VCC=3.0V
1MHz
fMax.
Automotive
Grade
BS616LV8017EA
TSOP II-44
50uA
8.0uA
110uA
60uA
10mA
61mA
2mA
25mA
BS616LV8017FA -40OC to +125OC
BGA-48-0912
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
A8
A13
A12
A11
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A18
A17
A16
A15
A14
A10
A9
A8
A7
A6
A5
A4
Address
Input
1024
Memory Array
10
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Row
BS616LV8017EC
BS616LV8017EI
Decoder
Buffer
1024 x 8192
8192
A9
A10
A11
A12
A13
DQ0
Data
Input
Buffer
16
16
Column I/O
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
.
16
.
16
Data
Output
Buffer
1
2
3
4
5
6
512
.
.
A
B
C
D
E
F
LB
OE
A0
A1
A2
NC
D0
Column Decoder
DQ15
D8
D9
UB
D10
D11
D12
D13
NC
A3
A5
A4
A6
CE
D1
9
CE
WE
OE
UB
LB
Address Input Buffer
D2
Control
VSS
VCC
D14
D15
A18
A17
NC
A14
A12
A9
A7
D3
VCC
VSS
D6
A14 A15 A16 A17 A18 A0 A1 A2 A3
VCC
VSS
A16
A15
A13
A10
D4
D5
G
H
WE
A11
D7
A8
NC
48-ball BGA top view
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS616LV8017A
Revision 2.2A
Mar. 2006
1