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BS616LV1611TAP70 PDF预览

BS616LV1611TAP70

更新时间: 2024-11-30 03:13:39
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BSI 静态存储器
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11页 127K
描述
SRAM

BS616LV1611TAP70 数据手册

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Very Low Power CMOS SRAM  
1M X 16 bit  
BS616LV1611  
Pb-Free and Green package materials are compliant to RoHS  
n FEATURES  
ŸWide VCC operation voltage : 2.4V ~ 5.5V  
n DESCRIPTION  
The BS616LV1611 is a high performance, very low power CMOS  
Static Random Access Memory organized as 1,048,576 by 16 bits  
and operates form a wide range of 2.4V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both  
high speed and low power features with typical CMOS standby  
current of 1.5uA at 3.0V/25OC and maximum access time of 55ns at  
3.0V/125OC.  
ŸVery low power consumption :  
VCC = 3.0V  
VCC = 5.0V  
Operation current : 46mA (Max.)at 55ns  
2mA (Max.)at 1MHz  
1.5uA (Typ.) at 25 OC  
Standby current :  
Operation current : 115mA (Max.)at 55ns  
10mA (Max.)at 1MHz  
Standby current :  
ŸHigh speed access time :  
6.0uA (Typ.) at 25OC  
Easy memory expansion is provided by an active LOW chip enable  
(CE1), active HIGH chip enable (CE2) and active LOW output  
enable (OE) and three-state output drivers.  
-55  
-70  
55ns(Max.) at VCC=3.0~5.5V  
70ns(Max.) at VCC=2.7~5.5V  
ŸAutomatic power down when chip is deselected  
ŸEasy expansion with CE2, CE1 and OE options  
ŸI/O Configuration x8/x16 selectable by LB and UB pin.  
ŸThree state outputs and TTL compatible  
The BS616LV1611 has an automatic power down feature, reducing  
the power consumption significantly when chip is deselected.  
The BS616LV1611 is available in 48-pin TSOP Type I package and  
48-ball BGA package.  
ŸFully static operation, no clock, no refresh  
ŸData retention supply voltage as low as 1.5V  
n POWER CONSUMPTION  
POWER DISSIPATION  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
PKG TYPE  
(ICC, Max)  
(IC CSB1, Typ.)  
(ICCSB1, Max)  
VCC=5.0V  
1MHz f M ax.  
VCC=3.0V  
f Max.  
VCC=5.0V V CC=3.0V VCC=5.0V VCC=3.0V  
1MHz  
2mA  
Automotive  
Grade  
BS616LV1611FA  
BGA-48-0912  
TSOP I-48  
6.0uA  
1.5uA  
220uA  
120uA  
10mA  
115mA  
46mA  
BS616LV1611TA -40OC to +125OC  
n PIN CONFIGURATIONS  
n BLOCK DIAGRAM  
A4  
A3  
A2  
A1  
A0  
1
2
3
4
5
6
7
8
48  
A5  
A6  
A7  
OE  
UB  
LB  
CE2  
NC  
DQ15  
DQ14  
DQ13  
DQ12  
VSS  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
A8  
47  
46  
45  
4 4  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
A13  
A12  
A11  
CE1  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
NC  
VSS  
DQ4  
DQ5  
DQ6  
DQ7  
A19  
WE  
A10  
A9  
A8  
A7  
A6  
A5  
A4  
Address  
Input  
1024  
Mem oryArray  
10  
Row  
Decoder  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
Buffer  
1024 x 16384  
BH616LV1611TC  
BH616LV1611TI  
16384  
DQ0  
Column I/O  
16  
16  
Data  
Input  
Buffer  
.
.
.
.
A18  
A17  
A9  
A10  
Write Driver  
Sense Am p  
A16  
A15  
A14  
22  
23  
24  
27  
26  
25  
A11  
A12  
A13  
.
.
.
.
16  
16  
Data  
Output  
Buffer  
.
.
.
1024  
.
Column Decoder  
10  
1
2
3
4
5
6
DQ15  
A
B
C
LB  
OE  
A0  
A1  
A2  
CE2  
CE2  
CE1  
WE  
OE  
UB  
Address Input Buffer  
D8  
D9  
UB  
A3  
A5  
A4  
A6  
CE1  
D1  
D0  
D2  
Control  
D10  
LB  
A14 A15 A16 A17 A18 A0 A1 A2 A3 A19  
VCC  
V
SS  
D
E
F
VSS  
VCC  
D14  
D15  
A18  
D11  
D12  
D13  
A19  
A8  
A17  
NC  
A14  
A12  
A9  
A7  
D3  
D4  
VCC  
VSS  
D6  
A16  
A15  
A13  
A10  
D5  
G
H
WE  
A11  
D7  
NC  
48-ball BGA top view  
Brilliance Semiconductor, Inc.  
reserves the right to change products and specifications without notice.  
R0201-BS616LV1611A  
Revision 2.2A  
1
Mar.  
2006