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BS616LV1010EIG70 PDF预览

BS616LV1010EIG70

更新时间: 2024-11-26 05:16:11
品牌 Logo 应用领域
BSI 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
11页 209K
描述
Very Low Power CMOS SRAM 64K X 16 bit

BS616LV1010EIG70 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP44,.46,32
针数:44Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.84Is Samacsys:N
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G44长度:18.41 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:44
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:64KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装等效代码:TSOP44,.46,32
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL电源:3/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
最小待机电流:1.5 V子类别:SRAMs
最大压摆率:0.04 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.4 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:DUAL
宽度:10.16 mmBase Number Matches:1

BS616LV1010EIG70 数据手册

 浏览型号BS616LV1010EIG70的Datasheet PDF文件第2页浏览型号BS616LV1010EIG70的Datasheet PDF文件第3页浏览型号BS616LV1010EIG70的Datasheet PDF文件第4页浏览型号BS616LV1010EIG70的Datasheet PDF文件第5页浏览型号BS616LV1010EIG70的Datasheet PDF文件第6页浏览型号BS616LV1010EIG70的Datasheet PDF文件第7页 
Very Low Power CMOS SRAM  
64K X 16 bit  
BS616LV1010  
Pb-Free and Green package materials are compliant to RoHS  
n FEATURES  
ŸWide VCC operation voltage : 2.4V ~ 5.5V  
n DESCRIPTION  
The BS616LV1010 is a high performance, very low power CMOS  
Static Random Access Memory organized as 65,536 by 16 bits and  
operates form a wide range of 2.4V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both  
high speed and low power features with typical CMOS standby  
current of 0.02uA at 3.0V/25OC and maximum access time of 55ns at  
2.7V/85OC.  
ŸVery low power consumption :  
VCC = 3.0V  
VCC = 5.0V  
Operation current : 25mA (Max.) at 55ns  
2mA (Max.) at 1MHz  
Standby current : 0.02uA (Typ.)at 25OC  
Operation current : 45mA (Max.) at 55ns  
5mA (Max.) at 1MHz  
Standby current : 0.4uA (Typ.) at 25OC  
ŸHigh speed access time :  
Easy memory expansion is provided by an active LOW chip enable  
(CE) and active LOW output enable (OE) and three-state output  
drivers.  
-55  
-70  
55ns(Max.) at VCC=2.7~5.5V  
70ns(Max.) at VCC=2.4~5.5V  
ŸAutomatic power down when chip is deselected  
ŸEasy expansion with CE and OE options  
ŸI/O Configuration x8/x16 selectable by LB and UB pin.  
ŸThree state outputs and TTL compatible  
ŸFully static operation  
The BS616LV1010 has an automatic power down feature, reducing  
the power consumption significantly when chip is deselected.  
The BS616LV1010 is available in DICE form, JEDEC standard  
44-pin TSOP II and 48-ball BGA package.  
ŸData retention supply voltage as low as 1.5V  
n POWER CONSUMPTION  
POWER DISSIPATION  
Operating  
STANDBY  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
PKG TYPE  
(ICCSB1, Max)  
(ICC, Max)  
VCC=5.0V  
10MHz  
VCC=3.0V  
10MHz  
VCC=5.0V VCC=3.0V  
1MHz  
4mA  
fMax.  
1MHz  
fMax.  
BS616LV1010DC  
BS616LV1010AC  
BS616LV1010EC  
BS616LV1010AI  
BS616LV1010EI  
DICE  
Commercial  
3.0uA  
5.0uA  
0.5uA  
1.5uA  
24mA  
25mA  
44mA  
1.5mA  
14mA  
15mA  
24mA  
BGA-48-0608  
TSOP II-44  
BGA-48-0608  
TSOP II-44  
+0OC to +70OC  
Industrial  
5mA  
45mA  
2mA  
25mA  
-40OC to +85OC  
n PIN CONFIGURATIONS  
n BLOCK DIAGRAM  
A4  
A3  
A2  
A1  
A0  
1
2
3
4
5
6
7
8
44  
A5  
A6  
A7  
OE  
UB  
LB  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A8  
A13  
CE  
A15  
Address  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
VSS  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
A15  
A14  
A13  
A12  
NC  
DQ15  
DQ14  
DQ13  
DQ12  
VSS  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
A8  
A9  
A10  
A11  
NC  
512  
Memory Array  
9
A14  
A12  
A7  
Input  
Row  
Decoder  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Buffer  
512 x 2048  
BS616LV1010EC  
BS616LV1010EI  
A6  
A5  
A4  
2048  
DQ0  
Data  
Input  
Buffer  
16  
16  
16  
Column I/O  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
.
16  
.
Data  
Output  
Buffer  
.
.
128  
1
2
3
4
5
6
Column Decoder  
DQ15  
A
B
C
D
E
F
LB  
D8  
OE  
A0  
A1  
A2  
NC  
7
CE  
WE  
OE  
UB  
LB  
UB  
D10  
D11  
D12  
D13  
NC  
A3  
A5  
A4  
A6  
CE  
D1  
D0  
D2  
Address Input Buffer  
Control  
D9  
A11  
A9  
A3  
A2  
A1  
A0  
A10  
VSS  
VCC  
D14  
D15  
NC  
NC  
NC  
A14  
A12  
A9  
A7  
D3  
VCC  
VSS  
D6  
VCC  
VSS  
NC  
A15  
A13  
A10  
D4  
D5  
G
H
WE  
A11  
D7  
A8  
NC  
48-ball BGA top view  
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.  
R0201-BS616LV1010  
Revision 2.6  
May. 2006  
1

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