bq4842Y
RTC Module With 128Kx8 NVSRAM
Registers for the rea l-time clock,
alarm and other special functions
Features
General Description
➤ I n t e gr a t e d S R AM , r e a l-t im e
clock, CPU supervisor, crysta l,
power-fa il con t r ol cir cu it , a n d
battery
The bq4842Y RTC Module is a non-
volatile 1,048,576-bit SRAM organ-
ized as 131,072 words by 8 bits with
a n in t egr a l a ccessible r ea l-t im e
clock and CPU supervisor. The CPU
supervisor provides a programmable
watchdog timer and a microproces-
sor reset. Other features include
alarm, power-fail, and periodic inter-
rupts, and a battery-low warning.
are located in registers 1FFF0h–
1FFFFh of the memory array.
The clock and alarm registers are
du a l-por t r ea d/wr it e SRAM loca-
tions that are updated once per sec-
ond by a clock control circuit from
the internal clock counters. The
dual-port registers allow clock up-
dates to occur without interrupting
n or m a l a ccess t o t h e r est of t h e
SRAM array.
➤ Rea l-Tim e Clock cou n t s h u n-
dredths of seconds through years
in BCD format
➤ RAM-like clock access
➤ Compatible with industry-
Th e device com bin es a n in t er n a l
lithium battery, quartz crystal, clock
a n d p ower -fa il ch ip, a n d a fu ll
CMOS SRAM in a pla st ic 32-pin
DIP module. The RTC Module di-
rectly replaces industry-standard
SRAMs a n d a lso fit s in t o m a n y
E P R O M a n d E E P R O M s ock e t s
without any requirement for special
write timing or limitations on the
number of write cycles.
standard 128K x 8 SRAMs
The bq4842Y also contains a power-
fail-detect circuit. The circuit dese-
lects the device whenever VCC falls
below tolerance, providing a high de-
gree of data security. The battery is
electrically isolated when shipped
from the factory to provide maxi-
mum battery capacity. The battery
remains disconnected until the first
➤ Unlimited write cycles
➤ 10-year minimum data retention
and clock operation in the ab-
sence of power
➤ Automatic power-fail chip dese-
lect and write-protection
➤ Watchdog timer, power-on reset,
alarm/periodic interrupt, power-
fail and battery-low warning
application of VCC
.
➤ Soft wa r e clock ca libr a t ion for
gr e a t e r t h a n ±1 m in u t e p e r
month accuracy
Pin Connections
Pin Names
A0–A16
CE
Address input
Chip enable
RST
32
1
V
A
INT
CC
A
31
30
2
3
16
15
A
14
4
WE
A
29
28
27
26
25
24
23
22
21
20
19
18
17
12
RST
WE
Microprocessor reset
Write enable
5
A
A
A
A
A
A
A
13
7
6
5
4
3
2
6
A
8
A
9
A
11
OE
7
8
9
OE
Output enable
10
11
12
13
14
15
16
A
10
CE
DQ
DQ
DQ
DQ
DQ
A
1
0
0
DQ0–DQ7 Data in/data out
A
DQ
DQ
DQ
7
6
5
4
3
INT
VCC
VSS
Programmable interrupt
1
2
+5 volts
Ground
V
SS
32-Pin DIP Module
PN484201.eps
Sept. 1996 C
1