NXP Semiconductors
BGU8823/A
Dual channel low-noise high linearity amplifier with DSA and SPDT
Symbol
Pin
Description
RFIN_D
11
RF Input to LNA1, diversity channel. An external DC block is required.
External SMD is required for matching.
VDD1_D
13
15
Supply to LNA1, diversity channel. Decoupling capacitors are required
LNA1OUT_D
RF output of LNA1, diversity channel. An external DC block + BIAS
choke are required.
DSAIN_D
LNA2OUT_D
VDD2_D
18
21
22
RF input to DSA, diversity channel. An external DC block + matching
SMD are required.
RF output of LNA2, diversity channel. An external DC block + BIAS
choke are required.
Supply to LNA2, diversity channel. Decoupling capacitors are required.
GPO/DSA_0_X dB Diversity 23
GPO (General Purpose Output). Leave open when not used.
Direct-access DSA setting between minimum attenuation and X dB
attenuation programmed prior to TDD mode diversity channel
GND/Disable Diversity
Channel
24
Ground or Disable Diversity Channel
SW_RF1
25
28
31
32
33
34
35
36
Switch RF path 1. An external DC block is required
Switch RF common. An external DC block is required
Switch RF path 2. An external DC block is required
Ground or Disable Main Channel
SW_RFC
SW_RF2
GND/Disable Main Channel
VDD_SPDT
VDD_SPI
VDD into SPDT, decoupling capacitors are required
VDD into SPI, decoupling capacitors are required
Supply to LNA2, main channel. Decoupling capacitors are required
VDD2_M
LNA2OUT_M
RF output of LNA2, main channel. An external DC block + BIAS choke
are required.
DSAIN_M
39
42
44
RF input to DSA, main channel. An external DC block + matching SMD
are required.
LNA1OUT_M
RF output from LNA1, main channel. An external DC block + BIAS
choke are required.
VDD1_M
GND
Supply to LNA2, diversity channel. Decoupling capacitors are required.
Exposed die pad
Ground
BGU8823/A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 6 — 15 April 2020
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