Features
• 3.0V to 5.5V Operating Range
• Advanced Low-voltage Electrically-erasable Programmable Logic Device
• User-controlled Power-down Pin Option
• Pin-controlled Standby Power (10µA Typical)
• Well-suited for Battery Powered Systems
• 10ns Maximum Propagation Delay
• CMOS and TTL Compatible Inputs and Outputs
• Latch Feature Hold Inputs to Previous Logic States
• Advanced Electrically-erasable Technology
– Reprogrammable
High-performance
Electrically
Erasable
– 100% Tested
• High-reliability CMOS Process
– 20 year Data Retention
Programmable
Logic Device
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200mA Latchup Immunity
• Industrial Temperature Ranges
• Dual-in-line and Surface Mount Packages in Standard Pinouts
• Inputs are 5V Tolerant
• Green Package Options (Pb/Halide-free/RoHS Compliant) Available
• Applcations include Glue logic for 3.3V systems, DMA Control, State Machine Control,
Graphics processing
Atmel ATF22LV10C
See separate datasheet for Atmel
ATF22LV10C(Q)Z option
1.
Description
The Atmel® ATF22LV10C is a high-performance CMOS (electrically erasable) pro-
grammable logic device (PLD) that utilizes the Atmel proven electrically erasable
Flash memory technology. Speeds down to 10ns and power dissipation as low as
10mA are offered. All speed ranges are specified over the 3.0V to 5.5V range for
industrial and commercial temperature ranges.
The ATF22LV10C provides a low-voltage and user controlled “zero” power CMOS
PLD solution. A user-controlled power-down feature offers “zero” (10µA typical)
standby power. This feature allows the user to manage total system power to meet
specific application requirements and enhance reliability, all without sacrificing speed.
(The Atmel ATF22LV10CQZ provides edge-sensing “zero” standby power (3µA typi-
cal), as well as low voltage operation. See the ATF22LV10CQZ datasheet.)
The ATF22LV10C is capable of operating at supply voltages down to 3.0V. When the
power-down pin is active, the device is placed into a zero standby power-down mode.
When the power-down pin is not used or active, the device operates in a full power
low voltage mode. Pin “keeper” circuits on input and output pins hold pins to their pre-
vious logic levels when idle, which eliminate static power consumed by pull-up
resistors.
The ATF22LV10C macrocell incorporates a variable product term architecture. Each
output is allocated from 8 to 16 product terms which allows highly-complex logic func-
tions to be realized. Two additional product terms are included to provide synchronous
reset and asynchronous reset. These additional product terms are common to all ten
registers and are automatically cleared upon power-up. Register preload simplifies
testing. A security fuse prevents unauthorized copying of programmed fuse patterns.
0780M–PLD–7/10
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