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AT25SF081-SSHD-B PDF预览

AT25SF081-SSHD-B

更新时间: 2024-10-29 00:55:39
品牌 Logo 应用领域
其他 - ETC 时钟光电二极管内存集成电路
页数 文件大小 规格书
47页 3039K
描述
8-Mbit, 2.5V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-IO Support

AT25SF081-SSHD-B 数据手册

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AT25SF081  
8-Mbit, 2.5V Minimum  
SPI Serial Flash Memory with Dual-I/O and Quad-IO Support  
PRELIMINARY DATASHEET  
Features  
Single 2.5V - 3.6V Supply  
Serial Peripheral Interface (SPI) Compatible  
Supports SPI Modes 0 and 3  
Supports Dual and Quad Output Read  
104MHz Maximum Operating Frequency  
Clock-to-Output (tV) of 6 ns  
Flexible, Optimized Erase Architecture for Code + Data Storage Applications  
Uniform 4-Kbyte Block Erase  
Uniform 32-Kbyte Block Erase  
Uniform 64-Kbyte Block Erase  
Full Chip Erase  
Hardware Controlled Locking of Protected Blocks via WP Pin  
3 Protected Programmable Security Register Pages  
Flexible Programming  
Byte/Page Program (1 to 256 Bytes)  
Fast Program and Erase Times  
0.7ms Typical Page Program (256 Bytes) Time  
70ms Typical 4-Kbyte Block Erase Time  
300ms Typical 32-Kbyte Block Erase Time  
600ms Typical 64-Kbyte Block Erase Time  
JEDEC Standard Manufacturer and Device ID Read Methodology  
Low Power Dissipation  
2µA Deep Power-Down Current (Typical)  
10µA Standby current (Typical)  
4mA Active Read Current (Typical)  
Endurance: 100,000 Program/Erase Cycles  
Data Retention: 20 Years  
Complies with Full Industrial Temperature Range  
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options  
8-lead SOIC (150-mil and 208-mil)  
8-pad Ultra Thin DFN (5 x 6 x 0.6 mm and 2 x 3 x 0.6 mm) (1)  
8-lead TSSOP (4 x 4 mm)(1)  
1. TSSOP and DFN packages are not currently in production. Package outline dimensions are subject  
to change.  
DS-25SF081A–045B–5/2014  

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