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AT17LV512-10JU-T PDF预览

AT17LV512-10JU-T

更新时间: 2024-10-28 03:07:19
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
23页 669K
描述
Configuration Memory, 512KX1, Serial, CMOS, PQCC20

AT17LV512-10JU-T 数据手册

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AT17LV65(1), AT17LV128(1), AT17LV256,  
AT17LV512, AT17LV010, AT17LV002, AT17LV040  
FPGA Configuration EEPROM Memory  
3.3V and 5.0V System Support  
Note 1.  
AT17LV65 and AT17LV128  
are Not Recommended for  
New Designs (NRND) and  
are Replaced by AT17LV256.  
DATASHEET  
Features  
EE Programmable Serial Memories Designed to Store Configuration Programs  
for Field Programmable Gate Arrays (FPGAs)  
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65,536 x 1-bit(1)  
131,072 x 1-bit(1)  
262,144 x 1-bit  
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524,288 x 1-bit  
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2,097,152 x 1-bit  
4,194,304 x 1-bit  
1,048,576 x 1-bit  
Supports both 3.3V and 5.0V Operating Voltage Applications  
In-System Programmable (ISP) via 2-wire Bus  
Simple Interface to SRAM FPGAs  
Compatible with the Atmel® AT6000, AT40K and AT94K Devices, Altera®  
FLEX®, APEXDevices, ORCA®, Xilinx® XC3000, XC4000, XC5200,  
Spartan®, Virtex® FPGAs  
Cascadable Read-back to Support Additional Configurations or Higher-density  
Arrays  
Very Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available in 6mm x 6mm x 1mm 8-lead LAP (Pin-compatible with 8-lead SOIC  
Package), 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC and  
44-lead TQFP Packages  
Emulation of the Atmel AT24CXXX Serial EEPROMs  
Low-power Standby Mode  
High-reliability  
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Endurance: 100,000 Write Cycles  
Data Retention: 90 Years for Industrial Parts (at 85C)  
Green (Pb/Halide-free/RoHS Compliant) Package Options Available  
Description  
The AT17LV FPGA Configuration EEPROMs (Configurators) provide an easy-to-  
use, cost-effective configuration memory solution for Field Programmable Gate  
Arrays. The AT17LV devices are packaged in the 8-lead LAP, 8-lead PDIP, 8-lead  
SOIC, 20-lead PLCC, 20-lead SOIC and 44-lead TQFP options(Table 1). The  
AT17LV Configurators use a simple serial-access procedure to configure one or  
more FPGA devices. The user can select the polarity of the reset function during  
programming. These devices also support a write protection mechanism within its  
programming mode.  
Atmel-2321J-FPGA-AT17LV65-128-256-512-010-002-040-Datasheet_102014  

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